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Title:
INTEGRATED TEMPERATURE LIMIT SENSOR
Document Type and Number:
WIPO Patent Application WO/1999/012010
Kind Code:
A1
Abstract:
Integrated temperature limit sensors which may be used as stand alone devices or as part of a larger integrated circuit to provide a logic signal change upon a temperature rise to a predetermined level, or alternatively, upon a temperature drop to a predetermined level. The temperature limit sensor generates a voltage proportional to absolute temperature and compares that voltage with a voltage proportional to the voltage across a forward biased pn junction, or a base-emitter voltage of a transistor. The combination of the increasing voltage proportional to absolute temperature and the decreasing pn junction voltage with absolute temperature provides enhanced sensitivity and reliable and repeatable performance.

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Inventors:
SHIEH SUI PING
Application Number:
PCT/US1998/014225
Publication Date:
March 11, 1999
Filing Date:
July 09, 1998
Export Citation:
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Assignee:
MAXIM INTEGRATED PRODUCTS (US)
International Classes:
G01K3/00; G01K7/01; (IPC1-7): G01K7/01; G01K3/00
Foreign References:
US5359236A1994-10-25
FR2627027A11989-08-11
Other References:
G.C. MEIJER: "A LOW-POWER EASY-TO-CALIBRATE TEMPERATURE TRANSDUCER", IEEE JOURNAL OF SOLID-STATE CIRCUITS., vol. 17, no. 3, June 1982 (1982-06-01), NEW YORK US, pages 609 - 613, XP002078237
PATENT ABSTRACTS OF JAPAN vol. 010, no. 305 (P - 507) 17 October 1986 (1986-10-17)
Attorney, Agent or Firm:
Blakely, Roger W. (Sokoloff Taylor & Zafman 7th floor 12400 Wilshire Boulevard Los Angeles, CA, US)
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Claims:
CLAIMS What is claimed is:
1. A temperature limit sensor comprising: an integrated circuit including; a first circuit generating an output voltage proportional to absolute temperature; a second circuit generating an output voltage responsive to the change in voltage across a forward conducting pn junction with temperature; and, a third circuit providing an output responsive to the difference between the output of the first circuit and the output of the second circuit.
2. The temperature limit sensor of claim 1 wherein the forward conducting pn junction circuit is coupled to the first circuit to have a forward conduction current there through approximately proportional to absolute temperature.
3. The temperature limit sensor of claim 1 wherein the first circuit comprises a bandgap generator.
4. The temperature limit sensor of claim 1 wherein the second circuit comprises a diode.
5. The temperature limit sensor of claim 1 wherein the second circuit comprises a diode connected transistor.
6. The temperature limit sensor of claim 1 wherein the third circuit comprises a comparator.
7. The temperature limit sensor of claim 6 further comprising a positive feedback circuit for providing a predetermined amount of hysteresis in the output of the third circuit.
8. A temperature limit sensor comprising: an integrated circuit including; a bandgap generator having an output voltage proportional to absolute temperature; a pn junction having an output voltage responsive to the change in voltage across a forward conducting pn junction with temperature; and, a comparator having an output responsive to the difference between the output of the first circuit and the output of the second circuit.
9. The temperature limit sensor of claim 8 wherein the pn junction is coupled to the bandgap generator so as to have a forward conduction current there through approximately proportional to absolute temperature.
10. The temperature limit sensor of claim 8 wherein the pn junction comprises a diode.
11. The temperature limit sensor of claim 8 wherein the pn junction comprises a diode connected transistor.
12. The temperature limit sensor of claim 8 further comprising a positive feedback circuit for providing a predetermined amount of hysteresis in the output of the comparator.
13. A method of sensing a temperature limit comprising, in an integrated circuit: providing a voltage proportional to absolute temperature; providing a voltage proportional to the voltage across a forward biased pn junction; and, comparing the voltage proportional to absolute temperature with the voltage proportional to the voltage across a forward biased pn junction to provide a change in state at a predetermined temperature limit responsive to the comparison.
14. The method of claim 13 wherein the voltage proportional to the voltage across a forward biased pn junction is provided by passing a current proportional to absolute temperature through the pn junction.
15. The method of claim 14 wherein the pn junction is a diode.
16. The method of claim 14 wherein the pn junction is a diode connected transistor.
17. A method of providing a temperature limit sensor comprising: providing in an integrated circuit; a first voltage proportional to absolute temperature; a second voltage proportional to the VBE of a pn junction; and, a comparator providing an output responsive to the comparison of the first and second voltages; and, at a first temperature; measuring the first and second voltages; and, trimming the integrated circuit to adjust the relationship between the first and second voltages so that the comparator output will provide an indication that the integrated circuit has reached a second temperature, the second temperature being different from the first temperature.
18. The method of claim 17 wherein trimming the integrated circuit to adjust the relationship between the first and second voltages is done by trimming the integrated circuit to adjust the first voltage relative to the second voltage.
19. The method of claim 17 wherein the first temperature is room temperature.
20. The method of claim 17 wherein the second voltage is equal to the VBE of a pn junction.
21. The method of claim 17 wherein the first voltage is provided by providing a current proportional to absolute temperature and passing the current proportional to absolute temperature through a resistor, and wherein the integrated circuit is trimmed by trimming the resistor.
Description:
INTEGRATED TEMPERATURE LIMIT SENSOR BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of temperature limit sensors, monitors and switches.

2. Prior Art The present invention is an integrated temperature limit sensor or monitor for providing a logic level change when the device becomes subjected to a excessively high (or excessively low) temperature, the output of which may be used for such purposes as alarm control, equipment control, shutdown, etc., depending on the application. Accordingly, the closest prior art is devices more commonly known as temperature switches which similarly provide an on-off, high-low or open- closed type of response.

Temperature switches of various kinds are well known in the prior art. Such switches are often used as an input to a temperature control, such as by way of example, in a home thermostat for heating and air conditioning controls, or heaters for coffee makers and the like. These switches typically are based on a simple bi-metal temperature sensing element, can handle substantial power, are of low cost for their power handling ability, and of adequate reliability for their usual applications. However, they are also relatively large, not very accurate or repeatable, and typically would not have the reliability of integrated circuits.

In other applications, temperature switches are merely used to monitor equipment, such as for shutting down the equipment if it begins to overheat, or in some cases preventing the turning on of the equipment if its temperature is too low for the proper operation thereof.

In the case of electronic equipment, overheating of the equipment may be indicative of such things as the failure of an active cooling system, inadequate ventilation for a passive cooling system, or an excessively high ambient temperature. In that regard, sensing the temperature of the equipment has certain advantages in that not all cooling system degradations result in overheating, and not all overheating is a result of cooling system degradations or failures.

Thus, sensing the attainment of a temperature limit of operation of a system and shutting the same down, or preventing the starting thereof, should prevent a temperature induced costly failure of the equipment, irrespective of the cause of the extraordinary equipment temperature condition. Sensing equipment temperature may also be advantageous, however, in conjunction with other cooling system sensors, such as fan operation sensors, etc., as such other sensors may provide a warning of another condition which will naturally lead to an excessive temperature condition, and can also be of diagnostic value. In any event, a simple integrated temperature monitor, operative independent of the cause of the extraordinary condition, provides a simple overriding indication of the extraordinary condition without concern for its cause, to allow action to be taken, such as a programmed shut down of the system to avoid damage thereto.

One prior art integrated circuit temperature limit monitor is shown in Figure 1. In this circuit, a bandgap generator generates a current proportional to absolute temperature through resistor R6, which is mirrored to transistor Q1 as part of the bandgap generator circuit and is also mirrored to transistors Q3 and Q4. The current mirrored to transistor Q3 passes through resistor R7, giving a voltage across resistor R7 which is also proportional to absolute temperature. As long as that voltage is below the VBE of transistor Q7, transistor Q7 will be off. Consequently, the output of the circuit will be pulled high by the current flowing through resistor R4 and Q4 (which normally will actually be less than the full current mirrored thereto because of the high collector voltage on transistor Q4 when transistor Q7 is off).

As temperature increases, the voltage proportional to absolute temperature across resistor R7 will also increase, beginning to turn on transistor Q7 when the voltage across resistor R7 is equal to the VBE of transistor Q7. When the temperature reaches the point where the collector current in transistor Q7 exceeds the full current mirrored to transistor Q4, the output will be pulled low. This transition will occur rapidly, provided the output is operating into a high input impedance downstream circuit of some kind.

The circuit of Figure 1 may be trimmed at a given temperature, such as at room temperature, to have a trip point at a substantially different temperature, either higher or lower than room temperature, by forcing the voltage of node N1 at room temperature to determine, at room temperature, the trip point voltage of node N1.

From this, the anticipated trip point at the desired trip temperature may be determined from the trip point voltage measured at room temperature and the anticipated change in the VBE of transistor Q7 between room temperature and the desired trip temperature. Then, resistor R7 may be trimmed so that the voltage of node N1 at room temperature is equal to the anticipated trip voltage at the desired trip temperature times the absolute room temperature divided by the absolute temperature at the desired trip point.

In practice, however, it is more difficult to force the voltage of node N1 and to vary the same to determine the trip point, because of noise in the system, than it is to merely measure the existing voltages for trimming as is done in the present invention. One can, of course, take multiple measurements and average the same to increase the measurement accuracy, though this will increase the time required and thus the cost of what it intended to be a low cost part. Also, the beta of transistor Q7, and more particularly the variation of the beta with temperature, will vary between devices.

Thus, the setting of the trip point at room temperature for the prior art devices can yield substantial variation and inaccuracy in the actual trip point when the desired trip point is substantially above or substantially below room temperature because of the unknown division of the current between resistor R7 and the base emitter junction of the transistor at the trip point. This is to be compared with the present invention wherein the effect of the beta of transistor Q7 on the performance of the circuit is eliminated, as is the requirement to force the voltage on any node, thereby making the setting, at room temperature, of the desired trip point an easier and more accurate process.

BRIEF SUMMARY OF THE INVENTION Integrated temperature limit sensors which may be used as stand alone devices or as part of a larger integrated circuit to provide a logic signal change upon a temperature rise to a predetermined level, or alternatively, upon a temperature drop to a predetermined level. The temperature limit sensor generates a voltage proportional to absolute temperature and compares that voltage with a voltage proportional to the voltage across a forward biased pn junction, or a base-emitter voltage of a transistor. The combination of the increasing voltage proportional to absolute temperature and the decreasing pn junction voltage with absolute temperature provides enhanced sensitivity and reliable and repeatable performance. Alternate embodiments are disclosed.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram of a prior art temperature limit sensor.

Figure 2 is a circuit diagram of a preferred embodiment of the present invention.

Figure 3 is a circuit diagram of an alternate embodiment of the present invention.

Figure 4 is a circuit diagram of a further alternate embodiment of the present invention.

Figure 5 is a plot illustrating the variation in the voltages VR and VD with temperature and the associated trip points.

DETAILED DESCRIPTION OF THE INVENTION Referring first to Figure 2, a preferred embodiment of the present invention may be seen. In this embodiment, transistor Q6 is eight times as large as transistor Q5. Also, transistors Q1 and Q2 are of the same size, and for convenience may be the same size as transistor Q5. Similarly, transistors Q3, Q4 and Q7 may also be of the same size as transistor Q5.

Assuming resistors R1 and R2 are equal, and neglecting base currents, transistor Q2 will mirror the current there through to transistor Q1. Consequently, the current through transistors Q5 and Q6 will be equal, though of course transistor Q6, having an area eight times as large as transistor Q5, will have a current density of only one-eighth of that of transistor Q5.

Accordingly, the VBE of transistor Q6 will be less than the VBE of transistor Q5, the difference appearing as a voltage drop across resistor R6.

In general, the base emitter voltage of a junction transistor is given by the following equation: where: T = temperature To = an arbitrary reference or starting temperature Jc = the transistor collector current density Jco = collector current density for which VBEO was determined Vgo = semiconductor bandgap voltage extrapolated to a temperature of absolute zero VBEO = base to emitter voltage V at To and Ico q = electron charge n = structure factor K = Boltzmann's constant If one subtracts the VBEs of two identical transistors operating with different collector currents, or as in the preferred embodiment of the present invention, two transistors Q5 and Q6 of different areas but otherwise identical and operating with equal collector currents, there results: Thus, the current through resistor R6, determined by the following equation, is proportional to absolute temperature (PTAT).

This current sets the voltage at the bases of transistors Q1, Q2, Q3 and Q4 equal to the voltage drop across resistor R2 and the VBEQ2 of transistor Q2.

Assuming resistor R3 is equal to resistor R2 and transistor Q3 is the same size as transistor Q2, the current through resistors R5 and R6 (assuming transistor M1 is off), or R5 alone (assuming transistor MI is on), will also be proportional to absolute temperature.

Thus, the voltage on the negative input VR to comparator COMP is a voltage proportional to absolute temperature.

The voltage on the base of transistor Q4, and particularly the value of resistor R4, will also determine the current through resistor R4, transistor Q4 and diode connected transistor Q7. If transistor Q4 is the same size as transistor Q2 and resistor R4 is the same resistance as resistor R2, the current through diode connected transistor Q7 will also be proportional to absolute temperature. This is not a requirement, however, as other types of current biasing for the diode connected transistor Q7 may be used if desired. Of particular importance, however, is that diode connected transistor Q7 be biased into forward conduction from some current source so that the positive input VD to the comparator is responsive to the VBE of transistor Q7.

In that regard, it will be noted from the foregoing equations that for the base emitter voltage of a junction transistor, the variation in VBE of a transistor with temperature is much greater than the variation in the VBE of the transistor with collector current density, so that in the preferred embodiment disclosed herein, a current through the diode connected transistor Q7 proportional to absolute temperature has little effect on the variation of the VBE of transistor Q7.

Alternatively, however, if desired, some other form of active current source could be used for resistor R4 and transistor Q4, or alternatively, transistor Q4 could be eliminated and a resistor such as resistor R4 of appropriate size connected directly to the common base collector connection of transistor Q7 to provide similar results, as shown in Figure 3.

The biasing of diode connected transistor Q7 by the current proportional to absolute temperature does have certain advantages. Because currents and voltages proportional to absolute temperature are already generated as part of the circuit, a forward conduction current through diode connected transistor Q7 proportional to absolute temperature is easily provided.

Further, it will be noted from the foregoing equations that the current proportional to absolute temperature is generated by transistors Q5 and Q6 and resistor R6, together with the biasing thereof, so as to provide a current proportional to absolute temperature which naturally is independent of the supply voltage (provided the supply voltage has adequate headroom for operation of the circuit over the temperature range).

Accordingly, use of the current proportional to absolute temperature for the forward conduction biasing of diode connected transistor Q7 has the further advantage of essentially providing a regulated bias current, that is, a bias current which is substantially input voltage (VREG) independent, allowing operation of the circuit over a wider supply voltage range, if the application so requires, without substantial error in the preset temperature limit setting.

As a further alternative, diode connected transistor Q7, in essence simply a pn junction, may be replaced by other types of pn junctions, such as by way of example, by a simple diode D1 as shown in Figure 4.

In any event, the characteristics of a simple pn junction or a diode connected transistor are substantially the same, the forward conduction voltage drop of the pn junction varying with temperature in accordance with the variation of VBE with temperature given by the foregoing equations. Obviously as a further alternative, a voltage proportional to the voltage drop across as forward conducting pn junction, such as a divided down VBE, or a series of two or more pn junction voltage drops may be used if desired.

Consider a low temperature condition for any of the three embodiments disclosed, wherein the voltage on the negative input to the comparator is less than the voltage on the positive input to the comparator. This forces the comparator output high, turning on n-channel transistor M1 to short out resistor R7. Thus, in this condition, the voltage proportional to absolute temperature appearing across resistor R5 is necessarily less than the voltage across the pn junction of the diode connected transistor Q7, in accordance with the assumed condition. As the temperature increases, the voltage across resistor R5 increases proportional to the absolute temperature increase. At the same time the pn junction forward conduction voltage of the diode connected transistor or the diode will predictably decrease with temperature. Consequently, when the limit temperature is reached, the voltage on the negative input to the comparator will have increased and the voltage on the positive input to the comparator will have decreased so that the negative input to the comparator equals or begins to exceed the positive input to the comparator. This causes the output of the comparator to change state, going low to turn off n- channel transistor M1. Now the voltage input to the negative terminal of the comparator will increase further by the additional voltage drop through resistor R7 caused by the current there through proportional to absolute temperature. In essence, resistor R7 provides hysteresis for the trip point of the comparator, resistor R7 normally being relatively small in comparison to resistor R5, though as a minimum preferably being adequate to provide enough hysteresis to avoid oscillation of the circuit in the presence of noise from neighboring circuitry and other equipment.

In general, the hysteresis need only represent a very few degrees Fahrenheit to be adequate under most conditions.

If the embodiments shown in Figures 2 through 4 are used to detect excessively low temperatures, the output of the comparator would be considered a positive logic signal in that the limit condition would be indicated by the normally low signal going high. If, on the other hand, the parameters for the various elements of the circuit are chosen to provide a limit signal when the temperature is excessively high, then the embodiments of Figures 2 through 4 would, in effect, provide a negative logic signal, being normally high when the temperature was below the limit and going low when the temperature limit is reached. These, of course, may easily be reversed as desired, by reversing the inputs to the comparator and substituting a p-channel transistor for n-channel transistor MI to preserve the small amount of positive feedback for hysteresis purposes.

Referring again to Figures 2 through 4, a change in the value of resistor R4, such as by way of trimming, will change the current through the diode connected transistor Q7 or diode D1. However, this will only have a minor effect on the forward conduction voltage drop across the pn junction, and accordingly, trimming of the resistor R4 will not normally provide an adequate trim capability to set the temperature limit point. In the preferred embodiment, resistor R5, by design, intentionally has a somewhat lower resistance than its final expected value, with a view toward laser trimming of resistor R5 (increasing the resistance thereof) to adjust the trip point at the time of wafer sort. Having the resistance of resistor R5 lower than ultimately desired decreases the voltage VR on the negative input to the comparator at any given temperature. Thus the voltage VR before trim versus temperature in degrees Kelvin is as shown in Figure 5.

During laser trim, the value of the resistor R5 is increased until the desired trip point is reached. In that regard, in the preferred embodiment, it is to be noted that a characteristic of a current proportional to absolute temperature as generated by a bandgap generator is very well known and very repeatable, as is the forward conduction voltage drop across a pn junction.

Thus, one can accurately set the trip point by setting VR in relation to VD at some other known temperature.

Accordingly, in the preferred embodiment, provision is made to bring out the inputs VR and VD of the comparator so that they may be probed during wafer sort for setting, at room temperature, the desired temperature trip point for the circuit by laser trimming of resistor R5. (Room temperature normally is approximately 70° F, though for specificity may be considered to range from 60 to 85° F.) This has a great advantage in cost, as trimming a circuit at temperature is very difficult and very expensive. Referring again to Figure 5, it is presumed that the desired trip point temperature Ttrip is above room temperature. The voltage VR is trimmed trimmed in relation to the voltage VD at room temperature as shown, to provide the desired crossing of the curves for the voltages VD and VR at the desired trip temperature. Use of a high input impedance comparator avoids any temperature sensitive loading on the VD and VR connections to preserve the accuracy of the trip point. Also, trimming to adjust the trip point at room temperature as described could be done by trimming resistors other than R5, but trimming of resistor R5 is preferred because its adjustment does not effect the balance of the bandgap generator or current mirrors and it is easier to trim than R6.

What has been described herein is a very low cost, accurate and repeatable temperature limit sensor which may be trimmed at room temperature at the time of wafer sort to set an accurate trip temperature which may be substantially above or substantially below room temperature. While certain preferred embodiments have been described in detail, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.