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Title:
LAMINATED INDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2012/140805
Kind Code:
A1
Abstract:
An external electrode (21) and a terminal electrode (22) are electrically connected via via holes (23), internal wiring (24), and an end surface electrode (41). A via hole (23) on the upper surface side is provided directly under the external electrode (21), said via hole being inside of a non-magnetic ferrite layer (11). A via hole (23) on the lower surface side is provided directly above the terminal electrode (22), said via hole being inside of a non-magnetic ferrite layer (15). Since an outermost layer is the non-magnetic ferrite layer, parasitic inductance is not increased even if the via hole is provided. In such case, since the internal wiring is not provided on the element surface, the wiring pattern is not complicated, and an increase of an element mounting area can be eliminated.

Inventors:
YOKOYAMA TOMOYA (JP)
SATO TAKAKO (JP)
IEDA AKIHIRO (JP)
HAYASHI SHIGETOSHI (JP)
YAZAKI HIROKAZU (JP)
Application Number:
JP2011/076985
Publication Date:
October 18, 2012
Filing Date:
November 24, 2011
Export Citation:
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Assignee:
MURATA MANUFACTURING CO (?6178555, JP)
YOKOYAMA TOMOYA (JP)
SATO TAKAKO (JP)
IEDA AKIHIRO (JP)
HAYASHI SHIGETOSHI (JP)
YAZAKI HIROKAZU (JP)
International Classes:
H01F17/00; H01F41/04
Domestic Patent References:
WO2008087781A12008-07-24
WO2007145189A12007-12-21
WO2007145189A12007-12-21
WO2008087781A12008-07-24
Foreign References:
JP2005183890A2005-07-07
JP2007266245A2007-10-11
JPH0786754A1995-03-31
Other References:
See also references of EP 2698798A4
Attorney, Agent or Firm:
Kaede Patent Attorneys' Office (?5400011, JP)
Patent business corporation Kaede Patent Attorneys' Office (?5400011, JP)
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Claims:



 
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