PROTECTION

TECHNICAL FIELD

The invention relates to an electronic ballast for a lamp having a switched converter, e.g. an inverter, connected with a voltage source, and a load circuit, which has the lamp and an output circuit, preferably a series resonance circuit, connected to the switched converter, wherein a charging capacitor is provided for pumping charge from a power supply to a storage capacitor in a charge pumping arrangement. The invention further relates a method of controlling an electronic ballast.

BACKGROUND TO THE INVENTION

The use of electronic ballasts for operating lamps, e.g. gas discharge lamps, is preferred over the use of conventional ballasts, due to lower losses and improved lamp efficiency, leading to significant energy savings. The input of a typical electronic ballast is formed by means of a high frequency filter connected to the voltage supply mains, which high frequency filter is connected with a rectifier circuit. The rectified supply voltage from the rectifier circuit is fed to a smoothing circuit for the generation of an intermediate circuit voltage, and finally an inverter (for example, including a half bridge) fed with the intermediate circuit voltage generates a high frequency a.c. voltage, which is applied to the load circuit with the gas discharge lamp connected thereto. The operation with high frequency a.c. voltage has as a consequence a reduction of electrode losses and an increase of the light yield. Further, there arises the possibility of igniting the lamp in a controlled and power conserving manner.

For igniting the gas discharge lamp normally its electrodes are initially preheated with an increased frequency of the inverter. At the end of this pre- heating period the frequency generated by the inverter is then reduced, so that it approaches the resonance frequency of the load circuit, which is primarily determined by a series resonance circuit arranged in the load circuit, and as a consequence thereof the voltage applied to the lamp increases. At a certain time point during the reduction of the frequency there is finally effected the ignition of the gas discharge lamp.

For operation of the half bridge, a control circuit detects, for monitoring the load circuit current, preferably the voltage dropping over a resistance arranged at the foot of the half-bridge of the inverter, and compares this with reference voltages. The monitoring of the current is then effected during the switch-on phase of the lower switch of the half-bridge. Beyond this, after the switching off of one of the two switches and before the following switching on of the other switch there is provided a predetermined delay time ("dead time"), in order to exclude a short-circuiting of the inverter. The switches are preferably MOS field effect transistors, the gates of which are controlled by the control circuit by means of pulse-width modulated signals.

With lamps as LEDs there is a need for additional flexibility as dimming is possible within a wide range and thus a large spectrum of power variation has to be covered.

Power conversion circuits such as electronic ballasts frequently use a rectifier circuit to convert the incoming AC (alternating current) line power into DC power, which is then stored in a large electrolytic storage capacitor as a stable source of DC power for the system. The disadvantage of such arrangements is that the incoming line current is taken in the form of a large spike each time the power line voltage rises above the voltage of the storage capacitor. These current spikes are not proportional to the line voltage in the manner preferred by electric utility companies, and are characterised as having a poor power factor. The ideal situation is that the current drawn from the power line should be directly proportional to the voltage and in phase with it, in which case the power factor is said to be unity, i.e., there is exact correspondence in wave shape between the incoming voltage and the current which is drawn.

Many schemes for causing the current drawn from the power line to be sinusoidal have been described. One particular scheme is to take some power from the output of the system and use it to pull current in from the AC power line with a sinusoidal waveform. Such circuits are characterised by the presence of a charge pump. In these charge pumps, high frequency AC voltages at the output of the system are used to drive an arrangement of capacitors and diodes so that charge is "pumped" out of the AC power line and into the storage capacitor. With good control of the pumping voltage and correct sizing of the pumping capacitor, power factors of 0.999 may be achieved, implying that the current drawn from the power line is almost purely sinusoidal when the voltage is sinusoidal. These techniques are referred to as "charge pump power factor correction" .

A known charge pump arrangement is shown in Figure 1. This circuit may be used with a 240 VAC, 50-60 Hz input line, for example. A full-wave bridge rectifier 10 is formed by diodes DF1, DF2, DF3 and DF4. A diode Dl is connected between the bridge rectifier 10 positive terminal 1 1 and a junction 12 to which lamp current flows. A second diode D2, poled in the same direction as diode Dl is connected between the junction 12 and a storage capacitor Cbus. Transistors Ml and M2 and connected in a series across storage capacitor Cbus, to form a half -bridge inverter having an inverter output junction 14 for driving the lamp circuit 16. The inverter is driven by a control circuit such as an appropriately configured ASIC.

The inverter formed by transistors Ml and M2 is normally operated (by applying signals to their gates from the control circuit) at a frequency above the effective resonant frequency of the resonance circuit with a 50% duty cycle for each transistor. During start-up, the frequency is swept downward toward the resonant frequency, as is well known. After the lamp has started, the high frequency current through the inductor Lr, causes the voltage at node 12 to rise and fall, once each cycle of lamp current, between limits related to the action of diodes Dl and D2.

Circuit behaviour follows a cyclical pattern. A charge capacitor C2, connected between the junction 12 and the lamp circuit 16, is charged during one phase, and during a subsequent phase the energy stored in capacitor C2 is pumped into the storage capacitor Cbus.

The principles of operation of such a circuit are described in the publication: "Analysis, Design and Experiments of a High-Power-Factor Electronic Ballast" by Jinrong Qian, Fred C. Lee, and Tokushi Tamauchi in IEEE Transactions On Industry Applications, Vol 34, No 3, May/June 1998 which is fully incorporated herein by reference.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention, there is provided an electronic ballast for a lamp having an switched converter, connected with a voltage source, and a load circuit, which has the lamp and an output circuit, connected to the switched converter, wherein a charging capacitor is provided for pumping charge from a power supply to a storage capacitor in a charge pumping arrangement, characterised by a switch device for controlling whether charge is transferred to the charging capacitor, and control means operable to control the switch device to vary the amount of charge that is transferred to the charging capacitor.

The control means may vary the duty cycle of the switch device in dependence upon an indication of the level of the voltage source.

A further capacitor may be connected in parallel with the charging capacitor, the charging capacitor having a capacitance at least 100 times greater than the further capacitor.

The control means may be operable to reduce the amount of charge transferred to the charging capacitor during a pre-heating and/or ignition phase of the lamp.

The control means may be operable to control the switch device synchronously with the switched converter switching.

The ballast control means may be operable to perform zero voltage switching of the switch device.

The switch device may comprise a switch connected in parallel across a diode.

The switch device may operate in the negative rail of the circuit.

The present invention further provides a method of controlling an electronic ballast for a lamp as defined in the claims.

In the embodiments, one diode of a charge pump is replaced by a controllable switch device. As this switch device can reduce the conduction time (in comparison with the diode), the amount of charge transferred to the charge capacitor can be reduced. By lowering the conduction time the amount of charge of the pump capacitor is reduced. Thus the transfer of energy can be controlled.

The lamp may be a gas discharge lamp such as a fluorescent lamp or a LED (light emitting diode), for example. BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the present invention embodiments will now be described by way of example, with reference to the accompanying drawings, in which:

Figure 1 shows a known charge pump circuit arrangement;

Figure 2 shows a charge pump circuit in accordance with a first embodiment of the present invention;

Figures 3 A, 3B, 3C and 3D show the flow of current at different stages of the cycle of operation of the charge pump circuit of Figure 2;

Figure 4 shows a charge pump circuit according to a second embodiment of the invention;

Figure 5 shows how the state of the switches of the second embodiment varies with respect to one another and with respect to time; Figure 6 shows a charge pump circuit according to a third embodiment of the invention;

Figure 7 shows a charge pump circuit according to a fourth embodiment of the invention.

In the drawing like elements are generally designated with the same reference sign.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION An electronic ballast circuit according to the invention is formed from a small number of basic circuits, each individually being well known or easily devised by one of ordinary skill in the art. A first embodiment of such a circuit is shown in Figure 2. The configuration and operation of the circuit is similar to that of the known circuit of Figure .

Power input may be from a standard low frequency AC line, such as 240 v, 50- 60 Hz. A filter may prevent conduction of high frequency and RF noise into the line. A rectifier 10 is typically formed as a full- wave bridge rectifier comprising diodes DF1, DF2, DF3 and DF4, whose output is rectified half- sine- wave pulses. The rectifier 10 output is coupled by a coupling circuit, including diode D2, to an energy storage element, such as an electrolytic storage capacitor Cbus, across which a relatively high DC voltage is maintained. During normal operation the voltage across this bulk storage capacitor Cbus is greater than the peak voltage appearing at the output of the rectifier 10.

A high frequency invertor, comprising switches (e.g. FETs) Ml and M2, changes the DC from the bulk storage capacitor Cbus to a high frequency voltage having a frequency typically between 20 and 75 kHz. A lamp circuit 16 includes a resonance coupling circuit Cr, Lr (e.g. comprising a capacitor and an inductor), connected to the invertor, and is arranged to be resonant at a frequency lower than the normal range of the high frequency voltage. A fluorescent lamp is connected to or across a part of the coupling circuit. A control circuit, which is preferably formed at least in part by an integrated circuit such as an ASIC, senses voltages or currents at one or more places in the coupling circuit, and provides control signals for the invertor to, inter alia, control switches Ml and M2. Charging current flows to storage capacitor Cbus during at least one different part of each cycle of the high frequency. Throughout all of every cycle of the line input, stored energy in the capacitor Cbus is higher than that which would be obtained by normal charging from the rectifier 10.

The circuit values and operating frequency range are selected such that the current from the input power line has a waveform substantially the same as the line voltage waveform, and the control circuit senses a parameter which varies over the course of each line voltage cycle, and may modulate the frequency of inverter over the same period in such a way as to maintain the high frequency current through the lamp substantially constant. This reduces the lamp crest factor.

Transistors Ml and M2 (e.g. FETs) are connected in series across the bulk storage capacitor Cbus to form a half-bridge inverter having an inverter output junction 14.

According to conventional principles (as shown in Figure 1), a simple diode, poled in the same direction as D2 would be connected between junctions 11 and 12. According to an important feature of this embodiment, connected between junctions 11 and 12 is a switch device M3. The switch device M3 may consist of an FET. The switch deice M3 is controlled by the control circuit.

When power is supplied initially, Cbus is charged via the closed switch M3.

A switching period may begin with a switching on or closing of the lower switch Ml of the half-bridge for a certain switching-on time ton. At the end of this switch-on time ton the switch Ml is again opened, and alternatingly the switch M2 closed. Between the opening of the switch Ml and the following closing of the switch M2 a dead time TD is waited out, in order in any event to avoid a simultaneous closing of the two switches Ml, M2 and therewith a short-circuiting of the inverter. Also the second switch M2 is closed for the switch-on time ton and thereafter again opened. After a further waiting out of the dead time TD the lower switch Ml is again closed, with which a complete switching period is ended.

The overall time Tp of a period is thus: Tp = 2.(ton + TD) The frequency of the inverter is correspondingly calculated as: f = 1 /Tp = 1 / [2. (ton + TD)]

During a start phase of the ballast, initially the electrodes of the lamp are pre- heated, which is effected in that there is applied to the load circuit an a.c. voltage having a frequency which lies significantly above the resonance frequency of the load circuit. The voltage yielded thereby is then too low to be able to bring about an ignition of the lamp. At the end of the pre-heating time, the ignition of the lamp is initiated, which is effected in that the switch on time ton for the two switches Ml, M2 of the inverter is stepwise increased and correspondingly the operating frequency of the inverter is reduced. The frequency then approaches ever closer the resonance frequency of the load circuit, until the voltage yielded thereby is so great that it brings about an ignition of the gas discharge lamp.

After igniting the fluorescent lamp electrically behaves essentially as an ohmic resistance, so that the lamp voltage after ignition falls, which is maintained in the run mode by a normal operating frequency of the switches Ml and M2.

As discussed above, the inverter formed by switches Ml and M2 is normally operated at a frequency above the effective resonant frequency of the resonance circuit with approximately a 50% duty cycle for each switch. During start-up, the frequency is swept downward toward the resonant frequency, as is well known. After the lamp has started, the high frequency current through Lr, causes the voltage at node 12 to rise and fall, once each cycle of lamp current. The voltage across the capacitor Cbus varies little during the course of one high frequency cycle.

In a first stage, Ml is ON and M2 is OFF. The switch M3 is initially ON. Current from the rectifier 10 flows through the switch M3 and flows as shown by the arrows in Figure 3A. C2 is charged while the switch M3 is ON. The ON time of the switch M3 defines the amount of charge stored on C2 in accordance with an important feature of the embodiment. In a second stage Ml is turned OFF (and M2 is OFF) as the dead time TD is reached. The circuit enters a "freewheeling period". Energy is transferred to the output depending on the charge of C2. Current flows as shown by the arrows in Figure 3B (through the body diode of M2), and energy is pumped into Cbus. In a third stage, Ml in OFF and M2 is ON. The current flows in the direction shown by the arrows in Figure 3C.

In a fourth stage Ml is OFF and M2 is turned OFF (dead time TD). Current flows in the direction of the arrows of Figure 3D (through the body diode of Ml). Energy is pumped from C2 into Cbus.

The ON time of the switch M3 during the first stage controls the amount of charge that is stored on the charge capacitor C2. During the fourth stage the amount of charge pumping from C2 to Cbus is dependent upon the amount of charge of C2 available. Thus, the ON time of M3 controls the amount of charge pumping in the circuit. Figure 4 shows an alternative arrangement of the circuit of Figure 2 in which the charge pump circuit is moved to the negative rail. The rectifier 10 (typically formed as a full-wave bridge rectifier) output is coupled by a coupling circuit, to an energy storage element, such as an electrolytic bulk storage capacitor Cbus, across which a relatively high DC voltage is maintained. During normal operation the voltage across this bulk storage capacitor Cbus is greater than the peak voltage appearing at the output of the rectifier 10.

A high frequency inverter changes the DC from the bulk storage device Cbus to a high frequency voltage having a frequency typically between 20 and 75 kHz. A lamp circuit 16 includes a resonance coupling circuit, connected to the inverter, is arranged to be resonant at a frequency lower than the normal range of the high frequency voltage. A fluorescent lamp is connected to or across a part of the coupling circuit. A control circuit, which is preferably formed at least in part by an integrated circuit, such as ASIC, senses voltages or currents at one or more places in the coupling circuit, and provides control signals for the inverter.

Charging current flows to storage device Cbus during at least one different part of each cycle of the high frequency. Throughout all of every cycle of the line input, stored energy in the device Cbus is higher than that which would be obtained by normal charging from the rectifier 10.

The circuit values and operating frequency range are selected such that the current from the input power line has a waveform substantially the same as the line voltage waveform, and the control circuit senses a parameter which varies over the course of each line voltage cycle, and may modulate the frequency of inverter over the same period in such a way as to maintain the high frequency current through the lamp substantially constant. This directly reduces the lamp crest factor.

Transistors Ml and M2 (e.g. FETs) are connected in series across the bulk storage capacitor Cbus to form a half-bridge inverter having an inverter output junction 14. The inverter is driven by a control circuit (not shown).

A diode D3 is connected between the bridge rectifier 10 negative terminal and a junction 22 to which lamp current flows from lamp circuit node 24 via a charge pump capacitor C2. A capacitor CI is connected in parallel with the charge pump capacitor C2 between the lamp circuit node 24 and the junction 26.

According to conventional principles, a diode, poled in the same direction as D3 would be connected between junctions 22 and 26. According to of this embodiment, connected between junctions 22 and 26 is a switch device M3. The switch device M3 comprises a switch connected in parallel across a diode DIA poled in the same direction as D3. The switch device M3 may consist of an FET and a body diode.

Compared to a conventional arrangement, the charge pump circuit has been moved to the negative rail and one diode replaced with an FET and diode in parallel (M3). M3 can be readily controlled from a control circuit referenced to the negative rail of the ballast. In this way, only M2 requires an isolated drive circuit.

When power is supplied initially, Cbus is charged via D3 and the internal body diode DIA of M3. The control of the two switches Ml, M2 of the inverter is effected by means of the control circuit, which passes control signals to the gates of the two field effect transistors Ml and M2 (and the gate of switch device M3).

A switching period begins with a switching on or closing of the upper switch M2 of the half-bridge for a certain switching-on time ton. At the end of this switch-on time ton the switch M2 is again opened, and alternatingly the switch Ml closed. Between the opening of the switch M2 and the following closing of the switch Ml a dead time TD is waited out, in order in any event to avoid a simultaneous closing of the two switches Ml, M2 and therewith a short- circuiting of the inverter. Also the second switch Ml is closed for the switch- on time ton and thereafter again opened. After a further waiting out of the dead time TD the upper switch M2 is again closed, with which a complete switching period is ended.

During the charging stage of the circuit, the state of the switch M3 controls whether or not current flows from the mains (rectifier 10) to charge C2. When the switch M3 is OFF current flows from the mains (rectifier 10) through the closed switch M2 to the inverter junction 14, then through the lamp circuit 16 to the charge capacitor C2, and through the diode D3. On the other hand, when the switch M3 is ON the current from the charge capacitor C2 is diverted across the switch M3 to Cbus, so current from the mains does not charge C2. In this way, the OFF duration of the switch M3 controls the amount of charge in C2, and therefore the amount of charge available to be pumped from C2 to Cbus during the charge pumping stage of operation. Preferably M3 is switched on and held on during the pre-heat and ignition phases so that no charge pumping occurs during these phases. This avoids the possibility of losing control of the bus voltage by pumping charge when the lamp is not illuminated. Once the ballast is running M3 can be switched off and the ballast functions as a ballast with charge pump power factor correction. However, advantageously, M3 may be controlled synchronously with the half bridge switching. At times when the diode D1A of M3 is conducting, M3 may be switched on. When the current reverses, C2 is charged via M3 rather than by D3. Switching M3 off while this charging current is flowing results in zero voltage switch off due to the clamping effect of CI and C2 around M3. This low loss switching of M3 varies the proportion of current flowing to the mains and therefore result in a controllable charge pump circuit.

As shown in Figure 5, Ml and M2 switch as normal with M3 switching on once its diode Dl A is already conducting and (due to Ml being ON) switching off some time after the diode Dl A would have stopped conducting (due to Ml being OFF). In this way, when the switch M3 is turned ON, current that would potentially have flowed from the mains to charge C2 instead flows from the lamp circuit 16. In this way, the state of M3 decides whether C2 maintains the lamp current or whether more current is drawn from the mains.

The pulse width of M3 may be reduced also during dimming (at low levels) and / or during stand-by mode. In general, the switch on time (duty cycle) of M3 may be varied in order to achieve a high power factor through the mains cycle. This means that the pulse width of the M3 control signal has to be varied through the mains cycle. In addition or alternatively the pulse width of M3 can be varied depending on the control signals for the switched converter which powers the load. In case of a halfbridge as a switched converter the pulse width of M3 can be varied depending on the switching frequency of Ml and M2. In case of a pulse width modulated control of the switched converter (e.g. a flyback) the pulse width of M3 can be varied depending on the pulse width of the switched converter. Such variation may also depend on the dimming signal as this reflects the control signal for the switched converter or it may depend on the operating state of the switched converter. As for instance in case of a stand by mode or failure mode the load will be small the pulse width of M3 has to be limited (or at least partly be zero). M3 can also be operated in a kind of burst mode where only a limited number of pulses is applied followed by a period of no pulses.

Due to the controllable switch M3 this circuit has the advantage of a higher degree of freedom as the amount of energy transferred by the charge pump circuit can be influenced by this switch M3.

Dimensioning of C 1 & C2 In a conventional charge pump circuit, CI would be responsible for maintaining the lamp current as the mains passes through its zero crossing. Without this capacitor, the lamp current would reduce to zero. In the circuit of Figure 4, CI is only needed to act as a snubber for M3 and as such can be a low value such as InF. Switching M3 on progressively longer as the mains voltage reduces helps to maintain the lamp current. As M3 can be switched off completely near the peak of mains, it does not divert current away from the charge pump capacitor, C2, and so improved charge pump efficiency is possible compared to a conventional charge pump circuit. The relative values of C 1 and C2 no longer play any part in shaping the input current waveform, so a larger value than would be chosen conventionally can be used for C2. A value such as lOOnF ensures little voltage appears across C2, and the need for diodes to clamp the voltage across CI to prevent voltages beyond the bus is avoided. As this implies no DC current flow into the charge pump node, formed by the connection of CI and C2, it is possible to use CI and C2 as the DC block capacitor and avoid the use of a separate component.

Characteristics of the circuit

During operation certain trends can be seen. If the switching frequency and on duration of M3 are held constant the following appears to be true. Increasing the bus voltage relative to the mains voltage causes an increased lamp power, but the ratio of the lamp power to the input power reduces. This indicates that the circuit is inherently stable with regard to its bus voltage. As the charge pump circuit uses a large value for C2 the operating frequency should not have much effect on it. C2 simply channels current through Dl or M3 with quite low voltage changes that are low at all the frequencies encountered. The lamp circuit will have far more influence on characteristics with regard to operating frequency.

This charge pump circuit has no inherent means of shaping the mains current to be sinusoidal. It simply directs the lamp circuit current. A table, indexed by the mains voltage, may be used to set the operating frequency and M3 ON duration. The mains voltage (or a value representative thereof) is often detected in ballast circuits to determine when a power outage occurs.

As an example, a table of 8 values could be set up for a ballast for a 32W T8 lamp. A look up table containing certain values of M3 for different input voltages may be stored on the control circuit. When the control circuit receives an input representative of Vin it can select from the Table suitable values to control Ml, M2 and M3 to provide the appropriate half bridge frequency and M3 ON duration.

As an alternative to a look-up table, the half bridge frequency and M3 on duration may be determined by a polynomial equation.

The operation of the switching device M3 may be used to control the intensity of the lamp (e.g. to provide controllable dimming). The operation of the switching device M3 may allow the ballast to operate at different mains voltage levels - such as those found in different countries.

Instead of a half bridge as switched converter other switched converter topologies may be applied as well, e.g. buck converter or a flyback converter in case of an LED as a lamp.

Figure 6 shows an alternative arrangement of the circuit of Figure 2 in which the charge pump circuit is extended by a capacitor C4. The result is a circuit which is fully symmetrical when M3 is not switched (as M3 acts as a diode).

Figure 7 shows an alternative arrangement of the circuit of Figure 6 in which the charge pump circuit is extended by a switching device M4. By adding a capacitor C5 this circuit is fully symmetrical. The switch on period of M3 may be during the switch on time of M2 and the switch on period of M4 may be during the switch on time of Ml .

By using a symmetrical circuit as shown in Fig. 6 or Fig. 7 the emission of disturbances (improved EMC) can be reduced and the lamp crest factor may be lowered.