LAMP ON/OFF OPERATION CONTROL METHOD, CLOCK GENERATION METHOD, CLOCK GENERATION CIRCUIT, LIGHT SOURCE CONTROL CIRCUIT, AND DISPLAY DEVICE

Title:

LAMP ON/OFF OPERATION CONTROL METHOD, CLOCK GENERATION METHOD, CLOCK GENERATION CIRCUIT, LIGHT SOURCE CONTROL CIRCUIT, AND DISPLAY DEVICE

Document Type and Number:

WIPO Patent Application WO/2010/044301

Kind Code:

A1

Abstract:

A PLL (6) serves as a clock generation circuit which uses a reference clock to generate a PWM clock for controlling the ON time and the OFF time of a light source (30) which uses the pulse width modulation method to illuminate a liquid crystal panel (4) in synchronization with a video signal for display at a predetermined cycle on the liquid crystal panel (4). By modifying the pulse interval of the reference clock in linkage with modification of the cycle, it is possible to generate a PWM clock which can hold a constant ratio of the ON time and the OFF time within one period of the cycle even when the cycle is modified.

Inventors:

TANAKA YUJI
MURAI TAKAYUKI

Application Number:

PCT/JP2009/063150

Publication Date:

April 22, 2010

Filing Date:

July 23, 2009

Export Citation:

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Assignee:

SHARP KK (JP)
TANAKA YUJI
MURAI TAKAYUKI

International Classes:

G02F1/133; G09G3/34; G09G3/20; G09G3/36; H04N5/66

Foreign References:

JP2007241286A	2007-09-20
JPH08340498A	1996-12-24
JP2008139480A	2008-06-19
JP2005274883A	2005-10-06
JP2008096696A	2008-04-24
JP2008145916A	2008-06-26
JP2000292767A	2000-10-20
JPH02249306A	1990-10-05
JPS5479150U	1979-06-05
JP2007241286A	2007-09-20
JPH08340498A	1996-12-24

Other References: