Title:
LATCH AND PROCESSOR COMPRISING LATCH, AND COMPUTING DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/207351
Kind Code:
A1
Abstract:
The present invention relates to a latch and a processor comprising the latch, and a computing device. Provided is an inverted output latch, comprising: an input stage configured to receive a latch input; an output stage configured to output a latch output; an intermediate node disposed between an output of the input stage and an input of the output stage, wherein the output stage is configured to receive a signal at the intermediate node as an input; and a feedback stage configured to receive the latch output and providing feedback to the intermediate node, wherein the feedback stage has a logic high state, a logic low state, and a high resistance state, and the latch output is inverted from the latch input.
Inventors:
GONG CHUAN (CN)
TIAN WENBO (CN)
FAN ZHIJUN (CN)
YANG ZUOXING (CN)
GUO HAIFENG (CN)
TIAN WENBO (CN)
FAN ZHIJUN (CN)
YANG ZUOXING (CN)
GUO HAIFENG (CN)
Application Number:
PCT/CN2023/080425
Publication Date:
November 02, 2023
Filing Date:
March 09, 2023
Export Citation:
Assignee:
SHENZHEN MICROBT ELECTRONICS TECH CO LTD (CN)
International Classes:
H03K3/037; H03K3/012
Foreign References:
CN114567293A | 2022-05-31 | |||
CN104079290A | 2014-10-01 | |||
CN213879787U | 2021-08-03 | |||
CN202713250U | 2013-01-30 | |||
JP2011023941A | 2011-02-03 |
Attorney, Agent or Firm:
CCPIT PATENT AND TRADEMARK LAW OFFICE (CN)
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