Title:
LAYOUT METHOD AND MANAGEMENT SYSTEM
Document Type and Number:
WIPO Patent Application WO/2021/094873
Kind Code:
A1
Abstract:
Provided is a novel layout method for a circuit. A layout method that has: a step whereby, in a circuit having a first terminal, a second terminal, a third terminal, a fourth terminal, a first wiring, and a second wiring, a layout is generated in which the first terminal and the third terminal are connected by using the first wiring; a step in which a layout is generated in which the second terminal and the fourth terminal are connected using the second wiring; a step in which a first wiring resistance for the first wiring is calculated; a step in which a second wiring resistance for the second wiring is calculated; and a step in which a layout for the first wiring and the second wiring in the circuit is automatically generated such that the first wiring resistance and the second wiring resistance are equal.
Inventors:
INOUE SEIKO (JP)
NAKAZATO RYO (JP)
FUKUTOME TAKAHIRO
NAKAZATO RYO (JP)
FUKUTOME TAKAHIRO
Application Number:
PCT/IB2020/060332
Publication Date:
May 20, 2021
Filing Date:
November 04, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
G06F30/394; G06F30/27; G06F30/398; H01L21/82
Foreign References:
| JP2004086509A | 2004-03-18 | |||
| JP2002343865A | 2002-11-29 | |||
| JP2013239668A | 2013-11-28 |
Download PDF: