Title:
LAYOUT STRUCTURE FOR REDUCING NOISE GENERATED BY PRINTED CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2017/008283
Kind Code:
A1
Abstract:
A layout structure for reducing noise generated by a printed circuit board comprises: a printed circuit board (PCB) (101), a power supply signal line (102), and at least two piezoelectric elements (103). The power supply signal line is disposed on the PCB. Two adjacent piezoelectric elements of the at least two piezoelectric elements are disposed on the PCB at the same angle and connected to the power supply signal line, respectively. Therefore, noise of the printed circuit board can be effectively reduced.
Inventors:
YANG TAO (CN)
Application Number:
PCT/CN2015/084136
Publication Date:
January 19, 2017
Filing Date:
July 15, 2015
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H05K1/18
Foreign References:
| US20100033938A1 | 2010-02-11 | |||
| CN101674709A | 2010-03-17 | |||
| US20040066589A1 | 2004-04-08 |
Attorney, Agent or Firm:
E-TONE INTELLECTUAL PROPERTY FIRM (CN)
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