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Title:
LDPC ENCODING DEVICE AND METHOD WHICH HAVE LOW LATENCY AND HIGH RELIABILITY CHARACTERISTICS
Document Type and Number:
WIPO Patent Application WO/2019/107912
Kind Code:
A1
Abstract:
An LDPC encoding device and method which have low latency and high reliability characteristics are disclosed. The disclosed device comprises: a parity generating matrix storage unit for storing a parity generating matrix which can be divided according to section (1); a first parity bit calculation unit for calculating parity intermediate variables and a first parity bit if l=2 through a permutation operation and an accumulator operation by using given codewords and the parity generating matrix; and a second parity bit calculation unit for calculating a second parity bit by using the parity intermediate variables if l=1, 3 and 4, wherein sub matrices divided by section from the parity generating matrix are matrices set to enable RU encoding. The disclosed device and method satisfy LMDG characteristics, thereby being suitable for low latency communication because of low complexity while guaranteeing high reliability.

Inventors:
KIM, Kwang-Soon (50 Yonsei-ro, Seodaemun-gu, Seoul, 03722, KR)
JEON, Ki Jun (50 Yonsei-ro, Seodaemun-gu, Seoul, 03722, KR)
Application Number:
KR2018/014814
Publication Date:
June 06, 2019
Filing Date:
November 28, 2018
Export Citation:
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Assignee:
INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY (50 Yonsei-ro, Seodaemun-gu, Seoul, 03722, KR)
International Classes:
H03M13/11
Attorney, Agent or Firm:
MIN, Young Joon (3F 2706, Nambusunhwan-ro,Gangnam-gu, Seoul, 06296, KR)
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