Title:
LED DISPLAY SYSTEM AND LED DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/049358
Kind Code:
A1
Abstract:
The purpose of the present invention is to provide a technology with which, in an LED display system comprising multiple control devices and comprising LED display devices that display videos on the basis of video signals distributed from the multiple control devices, the control devices perform power-saving control in a synchronized manner so that power consumption of the multiple LED display devices can be suppressed. Control devices 200 each include an average luminance calculation unit 24, a signal line, an average luminance value communication unit 31, a correction coefficient calculation unit 25, and a video signal distribution unit 14. The average luminance calculation unit 24 calculates the average luminance value Yave of pixels composing a frame, and generates a READY signal. The average luminance value communication unit 31 outputs the average luminance value to the signal line after detecting that the calculation of the average luminance value has been completed in all the control devices (200a, 200b, 200c, 200d). The correction coefficient calculation unit 25 calculates a common luminance correction coefficient Cy on the basis of the average luminance value Yave. The video signal distribution unit 14 distributes a video signal and the common luminance correction coefficient Cy to a unit-LED unit 100.
Inventors:
SAWADA KIYOSHI (JP)
ASAMURA YOSHINORI (JP)
ASAMURA YOSHINORI (JP)
Application Number:
PCT/JP2017/032640
Publication Date:
March 14, 2019
Filing Date:
September 11, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
G09G3/32; G09F9/33; G09G3/20; H01L33/00
Domestic Patent References:
| WO2013183139A1 | 2013-12-12 | |||
| WO2015136658A1 | 2015-09-17 |
Foreign References:
| JP2013097205A | 2013-05-20 | |||
| JPH0535194A | 1993-02-12 | |||
| JP2012247540A | 2012-12-13 | |||
| US20110298843A1 | 2011-12-08 |
Attorney, Agent or Firm:
YOSHITAKE Hidetoshi et al. (JP)
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