Title:
LEVEL SHIFT CIRCUIT AND METHOD
Document Type and Number:
WIPO Patent Application WO/2018/171249
Kind Code:
A1
Abstract:
Disclosed is a level shift circuit, comprising: an input circuit and a shift circuit. The input circuit is configured to carry out inversion and delay operations on input level signals to obtain a first level signal, a second level signal, a third level signal, and a fourth level signal. The rising edge of the first level signal is earlier than the falling edge of the second level signal by a first preset time, and the falling edge of the first level signal is later than the rising edge of the second level signal by a second preset time; the third level signal is a signal obtain by delaying the first level signal by a third preset time, and the fourth level signal is a signal obtain by delaying the second level signal by a fourth preset time; the first preset time is longer than the third preset time, and the second preset time is longer than the fourth preset time. The shift circuit is configured to output a first voltage signal and a second voltage signal according to the level signals. Also disclosed is a level shift method.
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Inventors:
MA JUN (CN)
WANG XIN (CN)
YI JIANGTAO (CN)
WANG XIN (CN)
YI JIANGTAO (CN)
Application Number:
PCT/CN2017/113622
Publication Date:
September 27, 2018
Filing Date:
November 29, 2017
Export Citation:
Assignee:
SMARTER MICROELECTRONICS SHANGHAI CO LTD (CN)
International Classes:
H03K19/0185
Foreign References:
CN107094012A | 2017-08-25 | |||
CN104124954A | 2014-10-29 | |||
CN102208909A | 2011-10-05 | |||
US7750689B1 | 2010-07-06 |
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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