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Title:
LIGHT EMITTING SEMICONDUCTOR METHODS AND DEVICES
Document Type and Number:
WIPO Patent Application WO/2010/120372
Kind Code:
A2
Abstract:
A method for producing light emission from a two terminal semiconductor device with improved efficiency, includes the following steps: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on the drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of the base region and comprising an emitter mesa that includes at least one emitter layer; providing, in the base region, at least one region exhibiting quantum size effects; providing a base/drain electrode having a first portion on an exposed surface of the base region and a further portion coupled with the drain region, and providing an emitter electrode on the surface of the emitter region; applying signals with respect to the base/drain and emitter electrodes to obtain light emission from the base region; and configuring the base/drain and emitter electrodes for substantial uniformity of voltage distribution in the region therebetween. In a further embodiment lateral scaling is used to control device speed for high frequency operation.

Inventors:
WALTER GABRIEL (US)
FENG MILTON (US)
HOLONYAK NICK (US)
THEN HAN WUI (MY)
WU CHAO-HSIN (US)
Application Number:
PCT/US2010/001133
Publication Date:
October 21, 2010
Filing Date:
April 16, 2010
Export Citation:
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Assignee:
UNIV ILLINOIS (US)
QUANTUM ELECTRO OPTO SYS SDN (MY)
WALTER GABRIEL (US)
FENG MILTON (US)
HOLONYAK NICK (US)
THEN HAN WUI (MY)
WU CHAO-HSIN (US)
International Classes:
H01S3/0941; H01S3/00
Foreign References:
US5796714A1998-08-18
US20050040387A12005-02-24
US4176367A1979-11-27
Attorney, Agent or Firm:
NOVACK, Martin (Delray Beach, FL, US)
Download PDF:
Claims:
CLAIMS:

1. A method for producing light emission from a two terminal semiconductor device with improved efficiency, comprising the steps of: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a base/drain electrode having a first portion on an exposed surface of said base region and a further portion coupled with said drain region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said base/drain and emitter electrodes to obtain light emission from said base region; and configuring said base/drain and emitter electrodes for substantial uniformity of voltage distribution in the region therebetween.

2. The method as defined by claim 1 , further comprising configuring the geometry of said emitter mesa between said electrodes for substantial uniformity of voltage distribution in said region between said electrodes.

3. The method as defined by claim 1 , further comprising providing an optical cavity for said light emission in the region between said first portion of the base/drain electrode and said emitter electrode.

4. The method as defined by any of claims 1-3, wherein said emitter mesa has a substantially rectilinear surface portion, and wherein said step of providing said electrodes comprises providing said emitter electrode along one side of said surface portion of the emitter mesa and providing the first portion of said base/drain electrode on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion.

5. The method as defined by claim 4, wherein said step of providing said electrodes further comprises providing said emitter electrode and the first portion of said base/drain electrode as opposing linear conductive strips.

6. The method as defined by claim 5, wherein said step of providing said emitter electrode and said first portion of said base/drain electrode as opposing linear conductive strips further comprises providing said conductive strips as having substantially the same length.

7. The method as defined by claim 5, wherein said step of providing said emitter electrode and said first portion of said base/drain electrode as opposing linear conductive strips further comprises providing said conductive strips as being of different lengths, so that the surface of emitter mesa between said strips is trapazoidal.

8. The method as defined by any of claims 1-7, wherein said step of providing, in said base region, a region exhibiting quantum size effects comprises providing at least one quantum well.

9. The method as defined by any of claims 1-8, further comprising providing an optical resonant cavity enclosing at least part of said base region, so that said light emission comprises laser emission.

10. A method for producing light emission from a three terminal semiconductor device with improved efficiency, comprising the steps of: providing a layered semiconductor structure including a semiconductor collector region comprising at least one collector layer, a semiconductor base region disposed on said collector region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a collector electrode on said collector region, providing a base electrode on an exposed surface of said base region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said collector, base, and emitter electrodes to obtain light emission from said base region; and configuring said base and emitter electrodes for substantial uniformity of voltage distribution in the region therebetween.

11. The method as defined by claim 10, further comprising configuring the geometry of said emitter mesa between said base and emitter electrodes for substantial uniformity of voltage distribution in said region between said base and emitter electrodes.

12. The method as defined by claim 10, further comprising providing an optical cavity for said light emission in the region between said base electrode and said emitter electrode

13. The method as defined by claim 10, wherein said emitter mesa has a substantially rectilinear surface portion, and wherein said step of providing said electrodes comprises providing said emitter electrode along one side of said surface portion of the emitter mesa and providing said base electrode on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion.

14. The method as defined by claim 13, wherein said step of providing said electrodes further comprises providing said emitter electrode and said base electrode as opposing linear conductive strips.

15. The method as defined by claim 14, wherein said step of providing said emitter electrode and said base electrode as opposing linear conductive strips further comprises providing said conductive strips as having substantially the same length.

16. The method as defined by claim 14, wherein said step of providing said emitter electrode and said base electrode as opposing linear conductive strips further comprises providing said conductive strips as being of different lengths, so that the surface of emitter mesa between said strips is trapazoidal.

17. The method as defined by any of claims 10-16, wherein said step of providing, in said base region, a region exhibiting quantum size effects comprises providing at least one quantum well.

18. A two terminal light-emitting semiconductor device for producing light emission in response to electrical signals, comprising: a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; said base region containing at least one region exhibiting quantum size effects; and a base/drain electrode having a flange portion contacting an exposed surface of said base region and a further portion contacting said drain region, and an emitter electrode on the surface of said emitter region, said electrical signals being applied with respect to said base/drain and emitter electrodes to cause light emission from said base region; said base/drain and emitter electrodes being configured to obtain substantial uniformity of voltage distribution in the region between said electrodes.

19. The device as defined by claim 18, wherein the geometry of said emitter mesa between said electrodes is configured to obtain substantial uniformity of voltage distribution in said region between said electrodes.

20. The device as defined by claim 18, further comprising an optical cavity for said light emission in the region between said flange portion of the base/drain electrode and said emitter electrode.

21. The device as defined by any of claims 18-20, wherein said emitter mesa has a substantially rectilinear surface portion, and wherein said emitter electrode is disposed along one side of said surface portion of the emitter mesa and said flange portion of said base/drain electrode is disposed on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion.

22. The device as defined by claim 21, wherein said emitter electrode and the flange portion of said base/drain electrode comprise opposing linear conductive strips.

23. The device as defined by claim 22, wherein said linear conductive strips have substantially the same length.

24. The device as defined by claim 22, wherein said opposing linear conductive strips have different lengths, so that the surface of emitter mesa between said strips is trapazoidal.

25. The device as defined by any of claims 18-24, wherein said region exhibiting quantum size effects comprises at least one quantum well.

26. The device as defined by any of claims 18-25, wherein said drain region comprises a tunnel junction comprising an n+ layer and a p+ layer, with said p+ layer being adjacent said base region.

27. A three terminal light-emitting semiconductor device for producing light emission in response to electrical signals, comprising: a layered semiconductor structure including a semiconductor collector region comprising at least one collector layer, a semiconductor base region disposed on said collector region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; said base region containing at least one region exhibiting quantum size effects; and a collector electrode on said collector region, a base electrode on an exposed surface of said base region, and an emitter electrode on the surface of said emitter region, said electrical signals being applied with respect to said collector, base, and emitter electrodes to cause light emission from said base region; said base and emitter electrodes being configured to obtain substantial uniformity of voltage distribution in the region between said electrodes.

28. The device as defined by claim 27, wherein the geometry of said emitter mesa between said base and emitter electrodes is configured to obtain substantial uniformity of voltage distribution in said region.

29. The device as defined by claim 27, further comprising an optical cavity for said light emission in the region between said base electrode and said emitter electrode.

30. The device as defined by claim 27, wherein said emitter mesa has a substantially rectilinear surface portion, and wherein said emitter electrode is disposed along one side of said surface portion of the emitter mesa and said base electrode is disposed on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion.

31. The device as defined by claim 30, wherein said emitter electrode and said base electrode comprise opposing linear conductive strips.

32. The device as defined by claim 31, wherein said opposing linear conductive have substantially the same length.

33. The device as defined by claim 31, wherein said opposing linear conductive strips have different lengths, so that the surface of emitter mesa between said strips is trapazoidal.

34. The device as defined by any of claims 27-33, wherein said region exhibiting quantum size effects comprises at least one quantum well.

35. A method for producing a high frequency optical signal component representative of a high frequency electrical input signal component, comprising the steps of: providing a semiconductor transistor structure that includes a base region of a first semiconductor type between semiconductor emitter and collector regions of a second semiconductor type; providing, in said base region, at least one region exhibiting quantum size effects; providing emitter, base, and collector electrodes respectively coupled with said emitter, base, and collector regions; applying electrical signals, including said high frequency electrical signal component, with respect to said emitter, base, and collector electrodes to produce output spontaneous light emission from said base region, aided by said quantum size region, said output spontaneous light emission including said high frequency optical signal component representative of said high frequency electrical signal component; providing an optical cavity for said light emission in the region between said base and emitter electrodes; and scaling the lateral dimensions of said optical cavity to control the speed of light emission response to said high frequency electrical signal component.

36 The method as defined by claim 35, further comprising providing an aperture disposed over said emitter region, and wherein said scaling of the lateral dimensions includes scaling the dimensions of said aperture.

37. The method as defined by claim 36, wherein said aperture is generally circular and is scaled to about 10 μm or less in diameter.

38. The method as defined by claim 36, wherein said aperture is generally circular and is scaled to about 5 μm or less in diameter.

39. The method as defined by claim 35, wherein said cavity is substantially rectangular, and wherein said scaling of lateral dimensions comprises providing said cavity with linear dimensions of about 10 μm or less.

40. The method as defined by claim 35, wherein said cavity is substantially rectangular, and wherein said scaling of lateral dimensions comprises providing said cavity with linear dimensions of about 5 μm or less in diameter.

41. The method as defined by claim 38, wherein said high frequency electrical signal component has a frequency of at least about 2 GHz.

42. The method as defined by any of claims 35-41 , wherein said high frequency electrical signal component has a frequency of at least about 2 GHz.

43. The method as defined by any of claims 35-42, wherein said scaling of dimensions includes increasing the collector region thickness to at least about 250 nm.

44. The method as defined by any of claims 35-43, wherein said step of applying electrical signals includes operating said semiconductor transistor in a common collector configuration.

45. The method as defined by any of claims 35-44, further comprising providing at least one reflector to enhance extraction of said output spontaneous optical emission.

46. The method as defined by any of claims 35-44, further comprising providing an optical resonant cavity enclosing at least part of said base region, and wherein said output emission comprises laser emission.

47. A method for producing a high frequency optical signal component representative of a high frequency electrical signal component, comprising the steps of: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a base/drain electrode having a first portion on an exposed surface of said base region and a further portion coupled with said drain region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said base/drain and emitter electrodes to produce light emission from said base region; providing an optical cavity for said light emission in the region between said first portion of the base/drain electrode and said emitter electrode; and scaling the lateral dimensions of said optical cavity to control the speed of light emission response to said high frequency electrical signal component.

48. The method as defined by claim 47, wherein said emitter mesa has a substantially rectilinear surface portion, and wherein said step of providing said electrodes comprises providing said emitter electrode along one side of said surface portion of the emitter mesa and providing the first portion of said base/drain electrode on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion.

49. The method as defined by claim 48, wherein said step of providing said electrodes further comprises providing said emitter electrode and the first portion of said base/drain electrode as opposing linear conductive strips.

50. The method as defined by claim 49, wherein said cavity is substantially rectangular, and wherein said scaling of lateral dimensions comprises providing said cavity with linear dimensions of about 10 μm or less.

51. The method as defined by claim 49, wherein said cavity is substantially rectangular, and wherein said scaling of lateral dimensions comprises providing said cavity with linear dimensions of about 5 μm or less.

52. The method as defined by any of claims 47-51 , wherein said high frequency electrical signal component has a frequency of at least about 2 GHz.

53. A method for producing a high frequency optical signal component representative of a high frequency electrical signal component, comprising the steps of: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a base/drain electrode coupled with said base region and coupled with said drain region, and providing an emitter electrode coupled with said emitter region; providing an aperture disposed over said emitter region; applying signals with respect to said base/drain and emitter electrodes to produce light emission from said base region; and scaling said aperture to control the speed of light emission response to said high frequency electrical signal component.

54. The method as defined by claim 53, wherein said aperture is generally circular and is scaled to about 10 μm or less in diameter.

55. The method as defined by claim 53, wherein said aperture is generally circular and is scaled to about 5 μm or less in diameter.

56. The method as defined by any of claims 53-55, wherein said high frequency electrical signal component has a frequency of at least about 2 GHz.

57. A device for producing a high frequency optical signal component representative of a high frequency electrical input signal component, comprising: a semiconductor transistor structure that includes a base region of a first semiconductor type between semiconductor emitter and collector regions of a second semiconductor type; at least one region, in said base region, exhibiting quantum size effects; emitter, base, and collector electrodes respectively coupled with said emitter, base, and collector regions; whereby, application of electrical signals, including said high frequency electrical signal component, with respect to said emitter, base, and collector electrodes, produces output spontaneous light emission from said base region, aided by said quantum size region, said output spontaneous light emission including said high frequency optical signal component representative of said high frequency electrical signal component, and; an optical cavity for said light emission in the region between said base and emitter electrodes; the lateral dimensions of said optical cavity being scaled to control the speed of light emission response to said high frequency electrical signal component.

58. The device as defined by claim 57, further comprising an aperture disposed over said emitter region, and wherein said aperture is generally circular and is scaled to about 10 μm or less in diameter.

59. The device as defined by claim 57, further comprising an aperture disposed over said emitter region, and wherein said aperture is generally circular and is scaled to about 5 μm or less in diameter.

60. The device as defined by claim 57, wherein said cavity is substantially rectangular, and wherein said cavity has linear dimensions of about 10 μm or less.

61. The device as defined by claim 57, wherein said cavity is substantially rectangular, and wherein said cavity has linear dimensions of about 5 μm or less.

62. A device for producing a high frequency optical signal component representative of a high frequency electrical signal component, comprising: a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; at least one region, in said base region, exhibiting quantum size effects; a base/drain electrode having a first portion on an exposed surface of said base region and a further portion coupled with said drain region, and an emitter electrode on the surface of said emitter region; whereby signals applied with respect to said base/drain and emitter electrodes produces light emission from said base region; and an optical cavity for said light emission in the region between said first portion of the base/drain electrode and said emitter electrode; the lateral dimensions of said optical cavity being scaled to control the speed of light emission response to said high frequency electrical signal component.

63. The device as defined by claim 62, wherein said cavity is substantially rectangular, and wherein said cavity is scaled to have linear dimensions of about 10 μm or less.

64. The device as defined by claim 62, wherein said cavity is substantially rectangular, and wherein said cavity is scaled to have linear dimensions of about 5 μm or less.

65. A device for producing a high frequency optical signal component representative of a high frequency electrical signal component, comprising: a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; at least one region, in said base region, exhibiting quantum size effects; a base/drain electrode coupled with said base region and coupled with said drain region, and an emitter electrode coupled with said emitter region; an aperture disposed over said emitter region; and whereby signals applied with respect to said base/drain and emitter electrodes produces light emission from said base region; said aperture being scaled to control the speed of light emission response to said high frequency electrical signal component.

66. The device as defined by claim 65, wherein said aperture is generally circular and is scaled to about 10 μm or less in diameter.

67. The device as defined by claim 65, wherein said aperture is generally circular and is scaled to about 5 μm or less in diameter.

Description:
LIGHT EMITTING SEMICONDUCTOR METHODS AND DEVICES

FIELD OF THE INVENTION

This invention relates to methods and devices for producing light emission and laser emission in response to electrical signals. The invention also relates to methods for producing high frequency light emission and laser emission from semiconductor devices with improved efficiency, and to increasing light output from semiconductor light-emitting devices.

BACKGROUND OF THE INVENTION A part of the background hereof lies in the development of heterojunction bipolar transistors which operate as light-emitting transistors and transistor lasers. Reference can be made for example, to U.S. Patent Numbers 7,091 ,082, 7,286,583, 7,354,780, 7,535,034 and 7,693,195; U.S. Patent Application Publication Numbers US2005/0040432, US2005/0054172, US2008/0240173, US2009/0134939, and US2010/0034228; and to PCT International Patent Publication Numbers WO/2005/020287 and WO/2006/093883. Reference can also be made to the following publications: Light-Emitting Transistor: Light Emission From InGaP/GaAs Heterojunction Bipolar Transistors, M. Feng, N. Holonyak, Jr., and W. Hafez, Appl. Phys. Lett. 84, 151 (2004); Quantum-Well-Base Heterojunction Bipolar Light- Emitting Transistor, M. Feng, N. Holonyak, Jr., and R. Chan, Appl. Phys. Lett. 84, 1952 (2004); Type-ll GaAsSb/lnP Heterojunction Bipolar Light- Emitting Transistor, M. Feng, N. Holonyak, Jr., B. Chu-Kung, G. Walter, and R. Chan, Appl. Phys. Lett. 84, 4792 (2004); Laser Operation Of A Heterojunction Bipolar Light-Emitting Transistor, G. Walter, N. Holonyak, Jr., M. Feng, and R. Chan, Appl. Phys. Lett. 85, 4768 (2004); Microwave Operation And Modulation Of A Transistor Laser, R. Chan, M. Feng, N. Holonyak, Jr., and G. Walter, Appl. Phys. Lett. 86, 131114 (2005); Room Temperature Continuous Wave Operation Of A Heterojunction Bipolar Transistor Laser, M. Feng, N. Holonyak, Jr., G. Walter, and R. Chan, Appl. Phys. Lett. 87, 131103 (2005); Visible Spectrum Light-Emitting Transistors, F. Dixon, R. Chan, G. Walter, N. Holonyak, Jr., M. Feng, X. B. Zhang, J. H. Ryou, and R. D. Dupuis, Appl. Phys. Lett. 88, 012108 (2006); The Transistor Laser, N. Holonyak and M Feng, Spectrum, IEEE Volume 43, Issue 2, Feb. 2006; Signal Mixing In A Multiple Input Transistor Laser Near Threshold, M. Feng, N. Holonyak, Jr., R. Chan, A. James, and G. Walter, Appl. Phys. Lett. 88, 063509 (2006); and Collector Current Map Of Gain And Stimulated Recombination On The Base Quantum Well Transitions Of A Transistor Laser, R. Chan, N. Holonyak, Jr., A. James , and G. Walter, Appl. Phys. Lett. 88, 14508 (2006); Collector Breakdown In The Heterojunction Bipolar Transistor Laser, G. Walter, A. James, N. Holonyak, Jr., M. Feng, and R. Chan, Appl. Phys. Lett. 88, 232105 (2006); High-Speed (/spl ges/1 GHz) Electrical And Optical Adding, Mixing, And Processing Of Square-Wave Signals With A Transistor Laser, M. Feng, N. Holonyak, Jr., R. Chan, A. James, and G. Walter, Photonics Technology Letters, IEEE Volume: 18 Issue: 11 (2006); Graded-Base InGaN/GaN Heterojunction Bipolar Light-Emitting Transistors, B. F. Chu-Kung et al., Appl. Phys. Lett. 89, 082108 (2006); Carrier Lifetime And Modulation Bandwidth Of A Quantum Well AIGaAs/lnGaP/GaAs/lnGaAs Transistor Laser, M. Feng, N. Holonyak, Jr., A. James, K. Cimino, G. Walter, and R. Chan, Appl. Phys. Lett. 89, 113504 (2006); Chirp In A Transistor Laser, Franz-Keldysh Reduction of The Linewidth Enhancement, G. Walter, A. James, N. Holonyak, Jr., and M. Feng, Appl. Phys. Lett. 90, 091109 (2007); Photon-Assisted Breakdown, Negative Resistance, And Switching In A Quantum-Well Transistor Laser, A. James,

G. Walter, M. Feng, and N. Holonyak, Jr., Appl. Phys. Lett. 90, 152109 (2007); Franz-Keldysh Photon-Assisted Voltage-Operated Switching of a Transistor Laser, A. James, N. Holonyak, M. Feng, and G. Walter, Photonics Technology Letters, IEEE Volume: 19 Issue: 9 (2007); Experimental Determination Of The Effective Minority Carrier Lifetime In The Operation Of A Quantum-Well n-p-n Heterojunction Bipolar Light-Emitting Transistor Of Varying Base Quantum-Well Design And Doping; H.W. Then, M. Feng, N. Holonyak, Jr., and C. H. Wu, Appl. Phys. Lett. 91 , 033505 (2007); Charge Control Analysis Of Transistor Laser Operation, M. Feng, N. Holonyak, Jr., H. W. Then, and G. Walter, Appl. Phys. Lett. 91, 053501 (2007); Optical Bandwidth Enhancement By Operation And Modulation Of The First Excited State Of A Transistor Laser, H. W. Then, M. Feng, and N. Holonyak, Jr., Appl. Phys. Lett. 91, 183505 (2007); Modulation Of High Current Gain (β>49) Light-Emitting InGaN/GaN Heterojunction Bipolar Transistors, B. F. Chu- Kung, C. H. Wu, G. Walter, M. Feng, N. Holonyak, Jr., T. Chung, J.-H. Ryou, and R. D. Dupuis, Appl. Phys. Lett. 91 , 232114 (2007); Collector Characteristics And The Differential Optical Gain Of A Quantum-Well Transistor Laser, H. W. Then, G. Walter, M. Feng, and N. Holonyak, Jr., Appl. Phys. Lett. 91 , 243508 (2007); Transistor Laser With Emission Wavelength at 1544 nm, F. Dixon, M. Feng, N. Holonyak, Jr., Yong Huang, X. B. Zhang, J. H. Ryou, and R. D. Dupuis, Appl. Phys. Lett. 93, 021111 (2008); and Optical Bandwidth Enhancement Of Heterojunction Bipolar Transistor Laser Operation With An Auxiliary Base Signal, H.W. Then, G. Walter, M. Feng, and N. Holonyak, Jr. Appl. Phys. Lett. 93, 163504 (2008).

Figures 1 and 2 illustrate an example of an existing tilted charge light emitter; that is, a light-emitting transistor ("LET") as described in the above referenced patent documents and publications. An n+ GaAs subcollector region 105 has an n-type GaAs collector region 110 deposited thereon, followed by a p+ AIGaAs/GaAs base region 120, having an n-type InGaAs quantum well (QW) 126. An emitter mesa is deposited over the base, and includes n-type InGaP emitter layer 130, and n-type AIGaAs aperture layer 140, and an n+ GaAs cladding layer 150. Lateral oxidation can be conventionally used to obtain annular oxide 141 and form the central aperture. The collector electrode or contact metallization is shown at 107, the base contact metallization is shown at 122, and the emitter contact metallization is shown at 152. Figure 2 shows a plan view of the Figure 1 metallizations; that is, opposing collector contacts (common connection not shown), the base contact 122 including an outer annular ring, and the emitter contact 152 including an inner annular ring.

Figure 1 also has arrows that illustrate the flow of electron current and hole current in typical light-emitting transistor operation. As described, for example, in the above referenced documents, light-emitting transistors, transistor lasers, and certain two terminal light emitters are sometimes referred to as "tilted charge" devices, owing to the "tilted" base charge distribution (as could be illustrated on the device band diagram) which locks the base electron-hole recombination in "competition" with the charge "collection" at the reverse-biased collector junction, thus selecting ("filtering") and allowing only "fast" recombination in the base (assisted by the quantum well(s)) at an effective lifetime of the order of picoseconds. [Reference can be made, for example, to the above-listed documents, including reference to a two-terminal tilted charge light emitter disclosed in U.S. Patent Application Publication No. US2010/0034228.]

In existing tilted charge devices, the optical cavity or window, defined in part by an aperture formed with an oxide, is placed after the base and emitter contact. Due to the high base sheet resistant and large current gain (emitter current) of the tilted charge device, the voltage difference across the base emitter junction is the greatest along the edge defined by the oxide aperture. This forces the recombination events (which result in the desired optical output) to localize along the perimeter of the oxide aperture, as current injection is largest in the region where voltage difference is largest. The junction voltage decreases towards the center of the optical cavity. This phenomenon is represented in Figures 1 and 2, and can be further understood from the modeling of device operation as shown in the simplified circuit model of Figure 3. In Figure 3, the regions and contacts correspond with those of like reference numerals in Figure 1. In the model, 307, 320, and 330 respectively represent the collector, base, and emitter resistances, 308 represents collector current components, and 340 represents the spatial components of base/emitter voltage. As was first seen in Figure 1 , the path of least resistance for electron conduction is along the edge defined by the oxide aperture. In the model of Figure 3, this results in V4 being substantially greater than V3, and V1 being substantially greater than V2. This causes most of the recombination events to localize nearer the edge of the base layer, and less recombination at and near the center of the base layer (see sketch of light output representation of Figure 2).

Figure 4 is a graph showing detected optical output of the device (as detector photo current in μA) as a function of device base current (in mA). The optical output for larger emitter diameter devices saturates at larger base current input. Saturation of light is attributed to quantum well saturation. In Figure 5, the optical output density and emitter current density for different emitter sizes (and hence, aperture sizes) is conveniently normalized to the aperture perimeter "area" (shaded area of inset in Fig. 5.) The area is determined by assuming a constant shallow penetration into the optical cavity. The result indicates that recombination is localized along the edge of the device. Maximum light output is therefore determined by the active perimeter defined by the oxide aperture rather than the area of the total optical cavity.

Figure 6 illustrates pulsed current measurement for various emitter sizes showing light output for both 10% and 50% pulsed current measurements to be substantially the same. Results indicate that light saturation for the device was not caused by heating but by localized quantum well saturation.

Figure 7 is a top view photograph of the type of existing device of Figure 1 , wherein the collector (C), base (B), and emitter (E) metallizations are denoted, and the optical cavity or window is indicated by an arrow. The light-emitting transistor of the Figure has a 10 urn emitter mesa and aperture defined optical cavity of 6 um. The optical cavity is located after the base and emitter contacts (i.e., above them, as in Figure 1). The active perimeter of this device is therefore about 18 μm. Similarly, Figure 8 shows an existing tilted charge light-emitting diode wherein the emitter (E) and base/drain (BD) metallizations are denoted and, again, the device has a 10 um emitter mesa and aperture defined optical cavity of 6 um. The optical cavity is again located after the base and emitter contacts. Again, the active perimeter of this device is about 18 μm.

In the described types of devices, as above noted, the optical window or cavity is placed after the base and emitter contact. Due to the high base sheet resistant and large current gain (emitter current) of the tilted charge device, the voltage difference across the base emitter junction is greatest along the edge defined by the oxide aperture. As explained above, this forces the recombination events (which result in the desired optical output) to localize along the perimeter of the oxide aperture, as current injection is largest in the region where voltage difference is largest. The junction voltage decreases towards the center of the optical cavity, with attendant disadvantages. Among the objects of an aspect of the present invention are to overcome these and other limitations of existing light-emitting devices, such as the described tilted-charge light emitters, and to improve light emission of light-emitting and lasing semiconductor devices.

The background of a further aspect of the invention is treated next.

Semiconductor light emitting diodes (LEDs) and lasers using direct gap IM-V materials, and electron-hole injection and recombination, have over the years led to numerous applications in display and lightwave communications. While semiconductor lasers typically dominate long-distance communication links, fast spontaneous lightwave transmitters can be an attractive solution for short range optical data communications and optical interconnections as their threshold-less operation, high fabrication yield and reduced driver and feedback control complexity significantly reduce the overall cost, form factor and power consumption of transmitters. Coupled with a proper cavity design, such as a resonant cavity, spontaneous light sources emitting at 980 nm have been shown to achieve external quantum efficiencies (η ext ) as high at 27% and an emission spectral width as narrow as 5 nm (see J. J. Wierer, D. A. Kellogg, and N. Holonyak, Jr., Appl. Phys. Lett. 74, 926 (1999)). However, the fastest spontaneous light source shown to date (a light emitting diode) employs p-doping as high as 7x10 19 cm "3 to achieve a bandwidth of 1.7 GHz (i.e., recombination lifetime of ~ 100 ps), at the cost of a reduced internal quantum efficiency to 10% or less (see C. H. Chen, M. Hargis, J. M. Woodall, M. R. Melloch, J. S. Reynolds, E. Yablonovitch and W. Wang, Appl. Phys. Lett. 74, 3140 (1999)). In practice, higher efficiency spontaneous devices such as LEDs or RCLEDs operate with bandwidths that are less than 1 GHz, restricting actual commercial application of spontaneous light transmitters (LEDs and RCLEDs) to less than 1 Gbits/s.

It has previously been proposed that the heteroj unction bipolar light emitting transistor (HBLET), which utilizes a high-speed heterojunction bipolar transistor (HBT) structure, could potentially function as a light source with speeds exceeding ten's of GHz (see M. Feng, N. Holonyak, Jr., and W. Hafez, Appl. Phys. Lett. 84, 151 (2004); M. Feng, N. Holonyak, Jr., and R. Chan, Appl. Phys. Lett. 84, 1952 (2004); W. Snodgrass, B. R. Wu, K. Y. Cheng, and M. Feng, IEEE Intl. Electron Devices Meeting (IEDM), pp. 663-666 (2007)). The room temperature, continuous wave operation of a transistor laser further demonstrates that a practical radiative recombination center (i.e., undoped quantum well) can be incorporated in the heavily doped base region of a HBLET (see M. Feng, N. Holonyak, Jr., G. Walter, and R. Chan, Appl. Phys. Lett. 87, 131 103 (2005)). Due to the short base effect of tilted charge population in transistors, the effective minority carrier lifetime in the base region of the HBLETs can be progressively reduced to sub-100 ps by tailoring the doping and incorporating QW(s) (see H. W. Then, M. Feng, N. Holonyak, Jr, and C. H. Wu, "Experimental determination of the effective minority carrier lifetime in the operation of a quantum-well n-p-n heterojunction bipolar light- emitting transistor of varying base quantum-well design and doping," Appl. Phys. Lett., vol. 91 , 033505, 2007; G. Walter, C. H. Wu, H. W. Then, M. Feng, and N. Holonyak, Jr., "4.3 GHz optical bandwidth light emitting transistor," (submitted to Appl. Phys. Lett.), 2009, supra) In practice, despite the high intrinsic speed of the HBT, the microwave performance of an HBLET is limited by parasitic capacitances, due to factors including extrinsic carrier transport effects and to the need to include light extraction features (such as oxide apertures) not present in traditional high speed HBT devices.

It is among the objects of an aspect of the present invention to address such limitations of prior devices and techniques, and to improve operation of tilted charge light-emitting devices and techniques, including three terminal light-emitting transistors and two terminal tilted charge light emitters.

SUMMARY OF THE INVENTION

In a form of a first aspect of the present invention, the light-emitting semiconductor devices are configured to obtain uniformity of carrier injection into the base region, and the optical cavity between base and emitter electrodes does not cause a deleterious non-uniformity of voltage distribution between the emitter and base (or base/drain) electrodes of the device, as in the prior art.

Regarding a further aspect of the invention, applicant has discovered that the lateral scaling of a heterojunction bipolar light-emitting transistor (LET) or a tilted charge light-emitting diode can improve both electrical and optical characteristics. For example, the fast recombination dynamics of the intrinsic transistor can be harnessed by scaling down an emitter aperture to reduce lateral extrinsic "parasitic-like" RC charging. The fast spontaneous modulation speeds, together with the high yield and reliability due to ease of fabrication and threshold-less operation of the LET or tilted charge light- emitting diode, offer attractive alternatives to laser sources, especially for use in short range optical data communications and interconnections.

In accordance with a form of the first aspect of the invention, a method is set forth for producing light emission from a two terminal semiconductor device with improved efficiency, including the following steps: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a base/drain electrode having a first portion on an exposed surface of said base region and a further portion coupled with said drain region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said base/drain and emitter electrodes to obtain light emission from said base region; and configuring said base/drain and emitter electrodes for substantial uniformity of voltage distribution in the region therebetween.

In an embodiment of this form of the invention, the geometry of said emitter mesa between said electrodes is configured to promote substantial uniformity of voltage distribution in the region between the electrodes. In a form of this embodiment, the emitter mesa has a substantially rectilinear surface portion, and the step of providing said electrodes comprises providing said emitter electrode along one side of said surface portion of the emitter mesa and providing the first portion of said base/drain electrode on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion. The emitter electrode and said first portion of the base/drain electrode can be opposing linear conductive strips.

In accordance with another form of the first aspect of the invention, a method is provided for producing light emission from a three terminal semiconductor device with improved efficiency, including the following steps: providing a layered semiconductor structure including a semiconductor collector region comprising at least one collector layer, a semiconductor base region disposed on said collector region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a collector electrode on said collector region, providing a base electrode on an exposed surface of said base region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said collector, base, and emitter electrodes to obtain light emission from said base region; and configuring said base and emitter electrodes for substantial uniformity of voltage distribution in the region therebetween.

In accordance with an embodiment of a first form of the further aspect of the invention, a method is set forth for producing a high frequency optical signal component representative of a high frequency electrical input signal component, including the following steps: providing a semiconductor transistor structure that includes a base region of a first semiconductor type between semiconductor emitter and collector regions of a second semiconductor type; providing, in said base region, at least one region exhibiting quantum size effects; providing emitter, base, and collector electrodes respectively coupled with said emitter, base, and collector regions; applying electrical signals, including said high frequency electrical signal component, with respect to said emitter, base, and collector electrodes to produce output spontaneous light emission from said base region, aided by said quantum size region, said output spontaneous light emission including said high frequency optical signal component representative of said high frequency electrical signal component; providing an optical window or cavity for said light emission in the region between said base and emitter electrodes; and scaling the lateral dimensions of said optical window or cavity to control the speed of light emission response to said high frequency electrical signal component. In an embodiment of the first form of this aspect of the invention, the method further comprises providing an aperture disposed over said emitter region, and said scaling of the lateral dimensions includes scaling the dimensions of said aperture. In one version of this embodiment, the aperture is generally circular and is scaled to preferably about 10 μm or less in diameter, and more preferably about 5 μm or less in diameter. In another version of this embodiment, the window or cavity is substantially rectangular, and said scaling of lateral dimensions comprises providing the window or cavity with linear dimensions of preferably about 10 μm or less, and more preferably about 5 μm or less in diameter. In the practice of an embodiment of the method, the high frequency electrical signal component has a frequency of at least about 2 GHz.

In accordance with an embodiment of a further form of the further aspect of the invention, a method is set forth for producing a high frequency optical signal component representative of a high frequency electrical signal component, including the following steps: providing a layered semiconductor structure including a semiconductor drain region comprising at least one drain layer, a semiconductor base region disposed on said drain region and including at least one base layer, and a semiconductor emitter region disposed on a portion of said base region and comprising an emitter mesa that includes at least one emitter layer; providing, in said base region, at least one region exhibiting quantum size effects; providing a base/drain electrode having a first portion on an exposed surface of said base region and a further portion coupled with said drain region, and providing an emitter electrode on the surface of said emitter region; applying signals with respect to said base/drain and emitter electrodes to produce light emission from said base region; providing an optical window or cavity for said light emission in the region between said first portion of the base/drain electrode and said emitter electrode; and scaling the lateral dimensions of said optical window or cavity to control the speed of light emission response to said high frequency electrical signal component.

In an embodiment of the further form of this aspect of the invention, said emitter mesa has a substantially rectilinear surface portion, and said step of providing said electrodes comprises providing said emitter electrode along one side of said surface portion of the emitter mesa and providing the first portion of said base/drain electrode on a portion of the base region surface adjacent the opposite side of said emitter mesa surface portion. In this embodiment, the step of providing said electrodes further comprises providing said emitter electrode and the first portion of said base/drain electrode as opposing linear conductive strips, and said scaling of lateral dimensions comprises providing said window or cavity with linear dimensions of preferably about 10 μm or less, and more preferably about 5 μm or less.

Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a cross-sectional representation of an example of an existing tilted charge light-emitting transistor device.

Figure 2 is a plan view of the contacts or electrodes of the Figure 1 device.

Figure 3 is a circuit model representing the relevant operation of the Figure 1 device.

Figure 4 is a graph showing optical output (as detector photocurrent) as a function of base current, for devices of different emitter diameters DE.

Figure 5 shows a graph of normalized optical output density as a function of emitter current over edge density, for devices different emitter diameters, DE. The inset shows a representation of the light emitting area, as a normalized aperture perimeter area. The area is determined by assuming a constant shallow penetration into the optical cavity.

Figure 6 shows photocurrent measurements as a function of emitter current for devices of various emitter sizes (in μm), showing 10% and 50% pulsed current points on each curve.

Figure 7 is a top view photograph of the type of existing device of Figure 1 , wherein the collector (C), base (B), and emitter (E) metallizations are denoted, and the optical cavity is indicated by an arrow.

Figure 8 is a top view photograph of a tilted charge light-emitting diode of the type described in copending U.S. Patent Application Serial No. 12/655,806, filed January 7, 2010, and assigned to the same assignees as the present application.

Figure 9 is a cross-sectional diagram of an example of an improved tilted charge light-emitting transistor in accordance with an embodiment of the invention and which can be used in practicing an embodiment of the method of the invention.

Figure 10 shows a circuit model of device operation of the Figure 9 embodiment.

Figures 11(a) and 11 (b) show opposing base and emitter contact or electrode strips as employed in embodiments of the invention

Figure 12 is a top view photograph of a titled charge light emitting transistor with a 10 μm X 10 μm Type 2 optical cavity design

Figure 13 shows the light-emitting transistor optical output (detector photo current) vs emitter current for the devices shown in Figure 7 (solid line) and Figure 12 (dashed line).

Figure 14 is a simplified cross-sectional diagram of a two-junction tilted-charge light emitting diode in accordance with an embodiment of the invention.

Figure 15 is top view photograph of the device of Figure 14, wherein the emitter (E) and base/dram (BD) metallizations are denoted, and the optical cavity is indicated by an arrow

Figure 16 is a table showing the semiconductor layers of an example of the Figure 15 device.

Figure 17 shows the I-V characteristic of the device of Figures 15 and 16.

Figure 18 shows the optical light output L-I characteristic of the Figure 15, 16 device, measured from the device substrate bottom, and, in the inset, the output optical spectrum in arbitrary units.

Figure 19 shows the optical output response of the Figures 15, 16 device at bias currents I E = 40, 50, and 60 mA showing the -3 dB frequency f 3db of 3 2, 5, and 7 GHz, respectively.

Figure 20 is a simplified cross-sectional diagram of an embodiment of the invention that utilizes a tunnel junction as the device's drain region Figure 21 is a simplified cross-section of a device in which embodiments of the improvements of the invention can be employed.

Figure 22 shows, in graph (a), the collector I-V characteristics and, in graphs (b), the optical output characteristics, of the Figure 21 device. The light emission is measured from the bottom of the device with a large-area photodetector.

Figure 23 shows, in graphs (a) and (b), respectively, the optical response of the common-collector HBLET device to BC and EC rf input at biases I B = 2 mA and V B c - 0 V (condition for reverse-biased BC junction).

Figure 24 is a plot showing F 3dB (in GHz) as a function of I B for EC input port modulation of the HBLET with D A ~ 6 μm and V B c at 0 volts. The inset shows the optical output (detector output in microwatts) as a function of I B .

Figure 25, plots (a) and (b), show the HBLET collector IV characteristics for examples with emitter sizes of (a) D A = 5 um and (b) D A = 13 μm.

Figure 26 shows HBLET optical light output (measured from the bottom) as a function base current, I B, with V B c = 0 V, for the three devices of this example, with D A = 5 μm, D A = 8 μm, and D A = 13 μm. The inset shows the optical spectrum as arbitrary units as a function of wavelength.

Figure 27 is a plot of normalized response as a function of frequency, with V BC = 0, for the three devices of this example with D A = 5 μm, D A = 8 μm, and D A = 13 μm.

Figure 28 is a plot of optical bandwidth as a function of base current for the three devices of this example with D A = 5 μm, D A = 8 μm, and D A = 13 μm.

Figure 29 is a simplified cross-sectional diagram of a tilted-charge light- emitting diode, in which an embodiment of the invention can be employed.

DETAILED DESCRIPTION

Figure 9 is a diagram of an improved tilted charge light-emitting transistor device in accordance with an embodiment of the first aspect of the invention. The devices hereof can be fabricated using, for example, conventional semiconductor deposition techniques for depositing Hl-V semiconductor layers and device fabricating and finishing techniques as described, for example, in the patents and publications listed in the Background portion hereof. From the bottom up, the device includes n+ subcollector region 905, n-type collector region 910, and p+ base region 920 containing quantum well 926. The emitter mesa includes n-type emitter layer 930 and n+ emitter cladding 950. In the present example, the device is an npn tilted charge light emitting transistor, it being understood that the principles hereof also apply to a pnp device. The collector electrode or contact metallization is represented at 907. The base contact is represented at 922, and the emitter contact is represented at 952.

In the embodiment of Figure 9, the optical cavity is advantageously placed in between the emitter and base electrodes. The emitter resistance (RE) is tuned relative to the emitter current to base current ratio (β+1) so that the voltage drop due to electron conduction equals the voltage drop due to base current as holes conduct laterally from the opposite direction. This results in a more uniform voltage drop across the base-emitter junction. Emitter resistance can be tuned by changing sheet resistances and by changing the geometry of the emitter mesa (Figure 11, below).

Figure 10 shows a circuit model of device operation of the Figure 9 embodiment. In Figure 10, the regions and contacts correspond with those of like reference numerals in Figure 9. In the model, 1007, 1020, and 1030 respectively represent the collector, base, and emitter resistances, 1008 represents collector current components, and 1040 represents the spatial components of base/emitter voltage. As seen in the Figure, the voltage drops across the base-emitter junction are made substantially uniform so that V1 , V2, V3 and V4 will be approximately the same. This means that the recombination events will be approximately uniform in the optical cavity.

A substantially symmetrical voltage drop across the base and emitter junction can be achieved by tuning the sheet resistance and geometry of the emitter mesa; e.g. by employing a geometry of the optical window or cavity (defined by in this case the exposed emitter mesa) to obtain the desired resistances. For example, the diagrams of Figures 11(a) and 11(b), show opposing base and emitter contact or electrode strips and, as the shaded area, the exposed emitter mesa from which generated light can be emitted. Compared to the "Type 2" device of Figure 11 (a), the "Type 1" device of Figure 11(b) will exhibit larger emitter resistance and smaller base resistance. Figure 12 is a top view photograph of a tilted charge light emitting transistor with a 10 μm X 10 μm "Type 2" optical cavity or window design. An approximate symmetric voltage distribution to obtain uniform light emission is achieved by designing RB=(β+1)R E - The active perimeter of this device is 10 μm.

Figure 13 shows the light-emitting transistor optical output (detector photo current) vs emitter current for the devices shown in Figure 7 (solid line - existing device) and Figure 12 (dashed line - example of an embodiment hereof). The distributed design structure hereof, despite having an active perimeter of 10 μm (Figure 12), which is almost half of the 18 μm perimeter of the existing design (Figure 7), is seen to be capable of about two times larger emitter current injection before reaching optical saturation. This indicates that a larger effective area of the optical window or cavity is involved in recombination as a result of the distributed design hereof.

Figures 14 and 15 show a two-terminal tilted charge light-emitting diode having the distributed design feature of an embodiment hereof, with the optical cavity placed between the emitter and base/drain and the tuned emitter resistance. In Figure 14, a p-type base region 1440 is disposed between unintentionally doped n-type drain region 1433 and n-type emitter region 1450, so that there is a first semiconductor junction between said emitter and base region and second semiconductor junction between the base region and the drain region. The base region 1440 includes quantum size region 1441 , such as, for example, one or more quantum wells or one or more regions of the quantum dots. Below the drain 1433 is n-type sub-drain 1434. Above the emitter is an emitter cladding and contact region 1460. The emitter region has emitter electrode coupled thereto, in the form of emitter contact 1453. A base/drain electrode is coupled with the base and drain regions. The base/drain electrode is a metallic contact 1470 that is deposited, in this embodiment, on the base region and sub-drain region. As shown in Figure 14, a positive bias voltage 1491 is applied to the base/drain contact 1470 with respect to the emitter contact 1453, and an AC voltage 1492 is also applied with respect to these contacts. The flow of electrons and holes in the Figure 14 device is shown by the arrows in the Figure. Recombination in the base region, aided by the quantum well, results in light emission. Waveguide and cavity configurations can be added to this structure in order to allow this device to function as a two junction laser diode, two junction resonance cavity light emitting diode, or two junction vertical cavity transistor laser. (For example, typical upper and lower distributed Bragg reflectors (DBRs) can be provided in the Figure 14 device to obtain an optical resonant cavity.) Radiative recombination is optimized in the active optical region, as represented in Figure 14 at 1485. From the top view photograph of Figure15, the emitter and base/drain metallizations, and the optical cavity or window region of the Figure 14 device can be seen.

For an example of the embodiment of Figure 14 (see also Walter, Wu, Then, Feng, and Holonyak, Applied Physics Letters, 94, 231125 (June, 2009)), the epitaxial layers of the crystal used for making a two-junction tilted- charge light emitting diode includes, upward from the substrate, a 3000 A n- type doped GaAs buffer layer, a 500 A graded Alo.30Gao.7 0 As confining layer, a 213 A graded AI 0 . 30 Ga0.70As to AI 09O Ga 0 ioAs oxide buffer layer, a 595 A n- type AI 0 . 98 Ga0.0 2 As oxidizable aperture layer and another 213 A graded Alo. 9 oGa 0 .ioAs to Al 03 oGa 0 .7oAs oxide buffer layer. A 557 A n-type GaAs contact layer, a 120 A InGaP etch stop layer, and a 2871 A undoped "drain" layer are grown on top. The "drain" layer is just beneath the 1358 A base layer, which includes two undoped 112 A InGaAs quantum wells and an AI 0 . 05 Ga 0 . 95 As layer with average doping of 3x10 19 cm "3 . The heterostructure emitter includes of a 511 A n-type In 0 49Ga 0 51 P layer, a 213 A graded Alo.3oGao 7oAs to Al 0 goGao ioAs oxide buffer layer, a 595 A n-type Alo98Ga O o2As oxidizable aperture layer, another 213 A graded AI 0 9O Ga 0 1 OAs to Al 0 3oGao.7oAs oxide buffer layer, and a 500 A graded AI 0 . 3 0Ga0.70As confining layer. The structure is completed with a 2000 A GaAs top contact layer. The aperture is optional. Reference can be made to the table of Figure 16, the last column of which indicates the layer description relative to the diagram of Figure 15.

The two-junction tilted-charge LED is fabricated by first performing wet etching steps to form emitter and base-"drain" mesas, followed by an isolation etch from the sub-"drain" layer to the substrate. Metallization steps are then performed to provide the required electrical contacts. The completed LED has only two terminals: (a) a contact to the emitter layer, and (b) another across the base and "drain" layers (see Figure 15). The base-"drain" forms a p-n junction with a reverse built-in field that is maintained by a common potential (zero potential difference) obtained via the common contact metallization extending to the base. The zero base-"drain" potential difference ensures that there is no base charge population density at the base-"drain" boundary, hence establishing the dynamic "tilted" emitter-to-"drain" population in the base, which was first described above. The "drain" layer performs therefore a role similar to the collector in a three-terminal HBLET. It allows excess minority carriers to be removed from the base (I 0 ), "swept" from base to "drain" by the built-in field at the base-"drain" p-n junction. Base carriers in transit from the emitter to the "drain" that do not recombine within the base transit time are removed, "drained". This enables fast modulation of the tilted- charge LED by preventing the build-up of "slow" charge in the base. The tilted-charge LED possesses the high speed optical modulation characteristics of an HBLET.

The tilted-charge LED can be biased as a usual two-terminal device, simply operating faster. Externally the tilted-charge LED displays an electrical I-V characteristic resembling that of a p-n junction diode (see Figure 17). The "turn-on" voltage is determined by the emitter-base potential difference since the base and "drain" are metalized and unified in potential. The L-I E optical output characteristic, shown in Figure 18, is obtained from the bottom emission (through the substrate) of the device. The broad radiative emission spectrum (FWHM ~ 96 nm) of the inset shows that the LED is operating in spontaneous recombination. The spectral peak occurs at λ = 1000 nm, corresponding to the ground state transition (1.24 eV) of the InGaAs quantum- wells. The optical output saturates with I E beyond 10 mA as the internal "transistor" gain, β = I C /IB, increases resulting in the base (recombination) current, I B = k/fβ+i) saturating. The optical output for this example is in the low microwatt range because the light extraction efficiency, assuming a single escape cone from the semiconductor GaAs-air interface, is only about 1.4%. To obtain the optical response of the device, the optical output is collected from the device top emission through a fiber, and measured with a 12 GHz p- i-n photodetector connected to an Agilent N5230A network analyzer. The optical response of the tilted-charge LED for I E = 40, 50, and 60 mA are shown in Figure 19. The data show an excellent fit to a single-pole response of the form, H(f) = A 0 Z(I +jf/f 3dB ) where f 3 dB = 1/(2πτ B ). For this example, a -3 dB bandwidth, /^ 6 , of 7 GHz at I E = 60 mA is obtained, corresponding to an effective r s = 23 ps.

Figure 20 shows another embodiment hereof which utilizes a tunnel junction as the drain region. Reference can be made, for example, to Tunnel Junction Transistor Laser, M. Feng, N. Holonyak, Jr., H.W. Then, CH. Wu, and G Walter, Appl. Phys Lett. 94, 04118 (2009). In Figure 20, elements with like reference numerals to those of Figure 14 correspond to those elements of Figure 14. In Figure 20, the p+ layer 1930 of the tunnel junction is adjacent the base 1440 and the n+ layer 1931 of the tunnel junction is adjacent an n-type sub drain layer 1434.

A further aspect of the invention, will be described next. For an example of an embodiment of this aspect of the invention, the epitaxial layers of the crystals used for a heterojunction bipolar light emitting transistor (HBLET), fabricated using MOCVD, included a 3000 A n-type heavily doped GaAs buffer layer, followed by a 500 A n-type AIo 3 oGao βoAs layer, a graded AIo 3 oGao 7 oAs to Al 0 goGa o ioAs oxide buffer layer, a 600 A n-type Alo 9 βGao o 2 As oxidizable layer, and then a graded AlogoGao ioAs to AI 03 oGao 7 oAs oxide buffer layer that completes the bottom cladding layers. These layers are followed by a 557 A n-type subcollector layer, a 120 A ln 04 gGao 5 iP etch stop layer, a 2871 A undoped GaAs collector layer, and a 1358 A average p-doped 3x10 19 cm "3 AIGaAs/GaAs graded base layer (the active layer), which includes two undoped 112 A InGaAs quantum wells (designed for λ « 980 nm). The epitaxial HBTL structure is completed with the growth of the upper cladding layers, which include a 511 A π-type Ino-igGaosiP wide-gap emitter layer, a graded AIo 3oGao 7oAs to Al 0 goGao ioAs oxide buffer layer, a 600 A n-type AlogβGaoo 2 As oxidizable layer, and a graded Al 0 goGao ioAs to Al 0 3 oGao 7oAs oxide buffer layer and a 500 A n-type Alo 3 oGa 0 7 oAs layer. Finally, the HBLET structure is capped with a 2000 A heavily doped n-type GaAs contact layer After various standard etching and contact metallization steps, the completed devices of the first example hereof have an oxide aperture diameter, DA, of - 6 μm on 10 μm emitter mesas.

A simplified schematic of the device cross section and its top view layout are shown in Figure 21. An n+ GaAs subcollector region 2105 has an n-type GaAs collector region 2110 deposited thereon, followed by p+ AIGaAs/GaAs base region 2120, having one or more undoped InGaAs quantum wells (QWs). An emitter mesa is formed over the base, and includes, n-type InGaP emitter layer 2130, and n-type AIGaAs aperture layer 2140, and an n+ GaAs cladding layer 2150. Lateral oxidation can be used to form the central aperture. The collector contact metallization is shown at 2107, the base contact metallization is shown at 2122, and the emitter metallization is shown at 2152.

The collector I-V and optical output characteristics are shown in Figure 22(a) and 22(b), respectively. The device exhibits a current gain β (= ΔI C /ΔI B ) as high as 30 (or 30 dB), e.g., at I B = 2 mA and VCE = 2 V. The light emission in Figure 3(b) is measured from the bottom of the device with a large-area photodetector. A light extraction efficiency of a single escape cone from the GaAs-air surface, assuming Fresnel reflection losses for normal incidence, is approximately 1.4%. (see M. G. Craford, High Brightness Light Emitting Diodes, Semiconductors and Semimetals, Vol. 48, Academic Press, San Diego, CA, p. 56 (1997)). The broad spectral characteristics of the optical output (see inset of graph (b); FWHM = 76 nm) is indicative of the width of the spontaneous recombination of the HBLET operation. The HBLET of this example does not incorporate a resonant cavity, it being understood that the use of a resonant cavity will substantially increase optical output extraction.

Operating the common-collector HBLET with the BC port as the rf-input allows for simultaneous electrical-to-optical output conversion, and electrical output gain at the EC output port. Due to its three-port nature, its optical output can also respond to input modulation signals at the EC-port, although in this configuration, the device does not provide a simultaneous electrical output gain at the BC-port. Deploying the EC-port as the rf-input has the advantage of better matched input impedance (50 Ω standard) for maximal power transfer. The BC-port input impedance is generally higher than the EC- input impedance due to the reverse-biased BC junction, and can be advantageous where high input impedances are desirable for maximizing circuit performances.

In an example hereof, the optical response is measured with a highspeed p-i-n photodetector with bandwidth > 12 GHz and a 50-GHz electrical spectrum analyzer. A frequency generator (0.05 - 20 GHz) is used for the input signal to the device. The optical response of the common-collector HBLET to BC and EC rf-input modulation at biases IB = 2 mA and V B c ~ 0 V (condition for reverse-biased BC junction) are shown in Figures 23(b) and 23(a), respectively. In both cases the response bandwidth at -3 dB, f 3 d B, is 4.3 GHz. In Figure 24, f3dβis seen to improve from 2.8 to 4.3 GHz as I B is increased from 1 to 2 mA. The optical output and response bandwidth are shown up to IB = 2 mA where the optical output (see plot of inset) begins to degrade due to saturation and heating.

The optical response, H(f) may be expressed as ) where A 0 is the electrical-to-optical conversion efficiency, and f 3 dB is the bandwidth at -3 dB. f 3 dB is related to an effective base carrier recombination lifetime r B (absent stimulated recombination but including the effects of undesirable parasitic RC-charging time) by the relation,

'- ύ-- <2)

A value for f 3 dB of 4.3 GHz therefore corresponds to a r B of 37 ps. Sub-100 ps recombination speeds are not readily achieved in a double heterojunction (DH) p-i-n light emitting diode, because equal number densities of electrons (n cm "3 ) and holes (p cm "3 ) are injected into the neutral undoped active region to preserve charge neutrality; therefore, an extremely high injection level and equivalently, a high charge population (since Imject/q = EWrvp-Vol = n Vol/r B) . are required in order to achieve high recombination speeds. In a HBLET 1 the holes are built-in by p-doping in the base, and re-supplied by an ohmic base current, while the (minority carrier) electrons are injected from the heterojunction emitter. Moreover, as opposed to the charge 'pile-up' condition in a double heterojunction p-i-n diode, the dynamic 'tilted' charge flow condition is maintained in the base of the transistor with the electrical collector (reverse-biased BC junction) in competition with base recombination. Because of the 'tilted' base population, current flow is a function of the slope in the charge distribution, and high current densities are possible without requiring extreme carrier densities. The heteroj unction bipolar transistor (HBT) n-p-n structure, therefore, possesses intrinsic advantages (in how charge is handled) over the double heterojunction p-i-n structure.

Thus, the 37 ps carrier lifetime observed in the HBLET hereof indicates that spontaneous recombination can be "fast", and higher modulation speeds are possible by further reducing the undesirable parasitics. In addition, due to the absence of the relaxation oscillations typically observed in laser devices, and the lesser signal attenuation slope of -20 dB per decade beyond the 3 dB bandwidth in contrast to the -40 dB per decade slope of laser response, an HBLET can potentially be deployed at data rates much higher than 4.3 Gb/s, with attendant advantage for short range optical data communications.

In further examples hereof, devices are fabricated as previously described, but with emitter aperture widths of 5 μm, 8 μm, and 13 μm, achieved by selective lateral oxidation of the n-AI 0 . 98 Ga 0 . 02 As layer (aperture layer 140 of Figure 1). The collector I-V characteristics for HBLETs with aperture widths of 5 μm (plot (a)) and 13 μm (plot (b)) and with VBC = 0 (that is, base and collector shorted) are shown in Figure 25. Figure 26 shows the corresponding optical light output characteristic L-IB as measured from the bottom-side of each of the three devices. At comparable base currents IB, the device with a 5 μm aperture achieves 2.4 times higher current gain than the 13 μm device. The 13 μm HBLET, however, produces an optical output 2.4 times higher. The current gain, β, and optical output saturate at high bias conditions (VCE ≥ 2 V) due to excessive heating as the devices are on semi- insulating substrate and operated without any temperature control. While total recombination radiation increases for the larger device, only a fraction of the radiative recombination occurs within the intrinsic transistor base region. Due to the 'ring'-like geometry employed in these examples, the proper intrinsic transistor base spans a concentric region with a radius proportional to DA/2, and an intrinsic device width (active edge) denoted by, say, t. Hence, the proportion of intrinsic base recombination to the total (extrinsic and intrinsic) recombination is roughly inversely proportional to the aperture width DA, and hence, scales by the simple ratio, ~ πD A f/π (D A /2) 2 = 4f/D A . As the device aperture size, D A , is reduced, an increasingly larger proportion of the injected carriers are confined to the intrinsic transistor base region (i.e., higher 4f/D A ), resulting in higher current densities and enhanced current gains. However, with a larger lateral geometry (i.e., larger D A and, hence lower 4f/D A ), the carrier contribution to extrinsic base (radiative and non-radiative) recombination increases, resulting in a lower β and commensurately higher light output. A typical optical spectrum of the devices (inset of Figure 26) shows a FWHM of 76 nm and demonstrates that the device is operating in spontaneous recombination. The light extraction of a single escape cone from the GaAs-air surface for these examples is highly inefficient. Assuming Fresnel reflection losses for normal incidence, the extraction efficiency is estimated to be 1.4% (see W. Snodgrass, B. R. Wu, K. Y. Cheng, and M. Feng, IEEE Intl. Electron Devices Meeting (IEDM), pp. 663-666 (2007).

In Figure 27 the HBLET is operated in the common-collector configuration with rf-input applied at the EC-port with V B c = 0 V. Although in this configuration the device does not provide a simultaneous output electrical gain, the EC-input impedance, Z E c, is well matched to the source impedance (50 Ω standard) for maximal power transfer. In this example the optical response is again measured with a 12 GHz p-i-n photodetector and a 50-GHz electrical spectrum analyzer. Also, a frequency sweep generator up to 20 GHz is again used for the input signal to the device. Figure 27 shows the maximum bandwidth optical response of 4.3, 2.8, and 1.8 GHz achieved by HBLETs of aperture size D A = 5, 8, and 13 μm, respectively. Higher bandwidths are attained with HBLETs employing a smaller aperture because a larger proportion of radiative recombination is confined to the intrinsic base of the HBLET where the intrinsic recombination speed of the carriers are faster, consistent with the observations derived from the collector I-V characteristics (Figure 25) and optical L-I 6 characteristics (Figure 26). The plot of the optical bandwidth vs. the bias base current I 8 for HBLETs of various aperture sizes (Figure 28) shows the increase in the optical bandwidth as the bias current (I B and hence, I E ) is increased. The maximum bandwidth is achieved where the optical and electrical characteristics begin to saturate due to heating, as is evident from Figures 25 and 26.

In the absence of stimulated recombination, one can simply express the optical response as a single-pole transfer function H(f) with representing the -3 dB frequency. The value f 3dB is related to an extrinsic base carrier recombination lifetime r B by f 3c(B = 1/(2τrr B ). Therefore, an extrinsic τ B of 37 ps is inferred from the value f 3dB = 4.3 GHz (for the device where D A = 5 μm), while a τ B of 88 ps is obtained for a 13-μm-aperture device. Lateral extrinsic recombination therefore forms an equivalent parasitic-like RC-charging time that limits the optical bandwidth of the device. Therefore, by lateral scaling, the device's performance can be improved by 'channeling' (via high current densities) and 'limiting' (via smaller apertures) the carriers to feed only radiative recombination originating or emanating from the intrinsic transistor base. Due to the presence of a finite (parasitic) lateral edge in the device construction, the τ B obtained of 37 ps is still dominated or limited extrinsically. This shows that the intrinsic transistor base recombination lifetime can be much faster than 37 ps, and implies that an even higher spontaneous optical bandwidth is possible.

In Figures 14-16 above, there is disclosed an embodiment of a two terminal tilted-charge light emitting diode having a non-circular (e.g. rectangular) region as its optical window or cavity, between linear emitter and base electrodes or contacts which can be opposing conductive strips. As was described, this configuration has the advantage of enhanced uniformity of carrier injection in the active region and efficient light output. The above- described scaling advantages are also applicable to this configuration. Reference can be made to the simplified cross-section of Figure 29 in which an n+ GaAs subdrain 2905 has an n-type drain region 2910 deposited thereon, followed by p+ AIGaAs/GaAs base region 2920, having one or more InGaAs quantum wells (QWs). An emitter mesa is formed over the base and includes an n-type InGaP emitter layer 2930, and an optional n-type AIGaAs aperture layer 2940, and an n+ GaAs cladding layer 2950. The emitter electrode metal is shown at 2952, and base/drain electrode metal at 2960. A similar configuration, between linear base and emitter electrodes, can also be employed in a three terminal light-emitting transistor or laser transistor. Again, the above-described scaling advantages are applicable to these device configurations.

The invention has been described with reference to particular preferred embodiments, but variations within the spirit and scope of the invention will occur to those skilled in the art. For example, appropriate reflectors can be employed to enhance extraction of output spontaneous optical emission. Also, where spontaneous emission LETs and diodes have been described, it will be understood that by employing appropriate reflective resonators, transistor lasers and diode lasers that benefit from the described features can also be devised.