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Patent Searching and Data


Title:
LLR COMPUTATION DEVICE AND ERROR CORRECTION DECODING DEVICE
Document Type and Number:
WIPO Patent Application WO/2013/080668
Kind Code:
A1
Abstract:
A two-pair reference point pair setting unit (101) sets two reference point pairs, selecting two send symbol points for LLR computation, said send symbol points having a bit value of 0, and selecting two send symbol points for LLR computation, said send symbol points having a bit value of 1. An LLR computation unit (113) weights and adds together two LLRs computed for each of the two reference point pairs, and computes the LLR for each of the two reference point pairs, as the value obtained by adding a correction term to the LLR sum, said correction term being 0 in some cases.

Inventors:
SUGIHARA KENYA (JP)
MATSUMOTO WATARU (JP)
Application Number:
PCT/JP2012/075992
Publication Date:
June 06, 2013
Filing Date:
October 05, 2012
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
SUGIHARA KENYA (JP)
MATSUMOTO WATARU (JP)
International Classes:
H04L27/00; H03M13/25; H03M13/39
Foreign References:
JP2011077940A2011-04-14
JP2008153874A2008-07-03
Other References:
F. TOSATO ET AL.: "Simplified soft-output demapper for binary interleaved COFDM with application to HIPERLAN/2", 2002 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS (2002. ICC), vol. 2, September 2002 (2002-09-01), pages 664 - 668, XP010589578
T. WADAYAMA: "A Coded Modulation Scheme Based on Low Density Parity Check Codes", IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS, COMMUNICATIONS AND COMPUTER SCIENCES, vol. E84-A, no. 10, October 2001 (2001-10-01), pages 2523 - 2527, XP001107784
R. ASVADI ET AL.: "LLR Approximation for Wireless Channels Based on Taylor Series and Its Application to BICM with LDPC Codes", 2011 IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE (GLOBECOM 2011), December 2011 (2011-12-01), pages 1 - 6, XP032118776
F. TOSATO; P. BISAGLIA: "Simplified Soft-Output Demapper for Binary Interleaved COFDM with Application to HIPERLAN/2", PROC. INT. CONF. COMMUN., September 2002 (2002-09-01), pages 664 - 668
T. WADAYAMA: "A Coded Modulation Scheme Based on Low Density Parity Check Codes", IEICE TRANSACTIONS ON FUNDAMENTALS, vol. E84-A, no. 10, October 2001 (2001-10-01), pages 2523 - 2527, XP001107784
Attorney, Agent or Firm:
TAZAWA, Hideaki et al. (JP)
Hideaki Tazawa (JP)
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Claims: