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Patent Searching and Data


Title:
LOAD VARIATION COMPENSATING CIRCUIT, ELECTRONIC DEVICE, TESTING APPARATUS, TIMING GENERATOR CIRCUIT AND LOAD VARIATION COMPENSATING METHOD
Document Type and Number:
WIPO Patent Application WO/2008/020524
Kind Code:
A1
Abstract:
A load variation compensating circuit comprises a delay circuit that receives a power supply voltage from a power supply, which is in common with an operating circuit, to output a delay signal obtained by delaying a given periodic signal by a delay amount in accordance with the power supply voltage; a phase comparing part that compares the phase of the periodic signal with that of the delay signal; an initializing part that generates, based on a comparison result of the phase comparing part, a bias voltage to be applied to the delay circuit and that adjusts the phase difference between the periodic signal and the delay signal to a predetermined phase difference; a control part that holds the bias voltage outputted by the initializing part when the phase difference between the periodic signal and the delay signal becomes equal to the predetermined phase difference; a current consuming circuit that has the power supply in common with the operating circuit; and a variation compensating part that controls the amount of the current to be supplied to the current consuming circuit, based on the comparison result outputted by the phase comparing part while the bias voltage outputted by the initializing part is being held.

Inventors:
SUDA, Masakatsu (1-32-1 Asahi-cho, Nerima-k, Tokyo 71, 1790071, JP)
Application Number:
JP2007/064376
Publication Date:
February 21, 2008
Filing Date:
July 20, 2007
Export Citation:
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Assignee:
ADVANTEST CORPORATION (1-32-1, Asahi-cho Nerima-k, Tokyo 71, 1790071, JP)
株式会社アドバンテスト (〒71 東京都練馬区旭町1丁目32番1号 Tokyo, 1790071, JP)
International Classes:
H03K19/00; H03K19/00
Attorney, Agent or Firm:
RYUKA, Akihiro (5F Shinjuku Square Tower, 22-1 Nishi-Shinjuku 6-chome, Shinjuku-k, Tokyo 05, 1631105, JP)
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