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Title:
LOGIC INTEGRATED CIRCUIT AND METHOD FOR CONTROL PERFORMED BY LOGIC INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/203220
Kind Code:
A1
Abstract:
Provided is a logic integrated circuit wherein a read/write control line is connected to a first circuit and a second circuit, a switch cell array is connected to the first circuit, and a logic element is connected to the second circuit, the logic integrated circuit being configured such that in a first mode, the first circuit allows signals to be transmitted between the read/write control line and the switch cell array, while the second circuit does not allow signals to be transmitted between the read/write control line and the logic element, and such that in a second mode, the first circuit does not allow signals to be transmitted between the read/write control line and the switch cell array, while the second circuit allows signals to be transmitted between the read/write control line and the logic element.

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Inventors:
NEBASHI RYUSUKE (JP)
SAKAMOTO TOSHITSUGU (JP)
MIYAMURA MAKOTO (JP)
TADA AYUKA (JP)
BAI XU (JP)
Application Number:
PCT/JP2020/011433
Publication Date:
October 08, 2020
Filing Date:
March 16, 2020
Export Citation:
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Assignee:
NEC CORP (JP)
International Classes:
H01L45/00; H01L21/82; H01L49/00; H03K19/17704
Domestic Patent References:
WO2017126451A12017-07-27
WO2017126544A12017-07-27
Foreign References:
JPH04188649A1992-07-07
JP2009017010A2009-01-22
JP2004326415A2004-11-18
JP2015180056A2015-10-08
Attorney, Agent or Firm:
TANAI Sumio et al. (JP)
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