Title:
MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2024/016374
Kind Code:
A1
Abstract:
A manufacturing method for a semiconductor structure, a semiconductor structure and a memory, relating to the technical field of semiconductor manufacturing. The manufacturing method for a semiconductor structure comprises: providing a substrate; forming a stack layer on the substrate, a plurality of active lines arranged at intervals being provided in the stack layer, and a plurality of transfer pillar bodies being formed in the stack layer; forming interval structures outside the transfer pillar bodies, and forming etch holes; etching along the etch holes active lines of a second composite mask layer and an initial semiconductor layer to form a plurality of discrete active region masks; and etching the substrate along the active region masks to form a plurality of discrete active regions. The method can effectively reduce the difficulty of manufacturing active regions, and improve the LCDU of active regions, improving the properties of semiconductor structures.
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| WO/2003/030267 | UMOSFET DEVICE AND METHOD OF MAKING THE SAME |
Inventors:
YU YEXIAO (CN)
LIU ZHONGMING (CN)
LIU ZHONGMING (CN)
Application Number:
PCT/CN2022/108778
Publication Date:
January 25, 2024
Filing Date:
July 29, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/308
Domestic Patent References:
| WO2022022017A1 | 2022-02-03 |
Foreign References:
| CN114093820A | 2022-02-25 | |||
| CN114203531A | 2022-03-18 | |||
| US20100164114A1 | 2010-07-01 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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