Title:
MANUFACTURING METHOD FOR TUNNELLING FIELD-EFFECT TRANSISTOR, AND TUNNELLING FIELD-EFFECT TRANSISTOR
Document Type and Number:
WIPO Patent Application WO/2018/120170
Kind Code:
A1
Abstract:
Disclosed are a manufacturing method for a tunnelling field-effect transistor, and a tunnelling field-effect transistor. The manufacturing method comprises: first using a spindle structure (13) to define a source region (21), and then forming a first gap wall (14) and a second gap wall (151) on two sides of the spindle structure (13), thus using the spindle structure (13), the first gap wall (14) and the second gap wall (151) as a mask to form a drain region (17); then removing the spindle structure (13), forming the source region (21) in a position of the spindle structure (13), and finally forming a gate structure (25) in a position of the first gap wall (14), so that the manufacturing method is not limited by a photolithography technique when the source region (21) and the drain region (17) are formed. In addition, the manufacturing method for a tunnelling field-effect transistor can use the second gap wall (151) to strictly control a non-overlapping region between the gate structure (25) and the drain region (17) so as to reduce a leak current of the tunnelling field-effect transistor, and uses an overlapping region between the gate structure (25) and the source region (21) to increase a turning-on current of the tunnelling field-effect transistor.
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Inventors:
TSAI HAOCHENG (CN)
XU WANJIE (CN)
ZHANG CHENXIONG (CN)
XU WANJIE (CN)
ZHANG CHENXIONG (CN)
Application Number:
PCT/CN2016/113844
Publication Date:
July 05, 2018
Filing Date:
December 30, 2016
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H01L29/78; H01L21/336; H01L29/06
Foreign References:
| CN105355660A | 2016-02-24 | |||
| US20150048313A1 | 2015-02-19 | |||
| CN104332502A | 2015-02-04 | |||
| CN104538442A | 2015-04-22 | |||
| CN103779418A | 2014-05-07 |
Attorney, Agent or Firm:
SHENPAT INTELLECTUAL PROPERTY AGENCY (CN)
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