Title:
MATCHER AND MATCHING METHOD
Document Type and Number:
WIPO Patent Application WO/2015/129678
Kind Code:
A1
Abstract:
Provided is a matching algorithm that converges on a matching point regardless of load impedance. A matcher provided with: a directional coupler that detects travelling waves and reflected waves; a matching circuit that has a first variable capacity capacitor, a second variable capacity capacitor, and an inductance; and a control unit that calculates a reflection coefficient on the basis of the travelling waves and the reflected waves and that controls the capacitance value (VC1) of the first variable capacity capacitor and the capacitance value (VC2) of the second variable capacity capacitor. When the distance between the calculated reflection coefficient and a circle that is described by a reflection coefficient trace that passes through the matching point of a Smith chart is larger than a prescribed value, the control unit alters VC2 and makes said distance within said prescribed value, and when said distance is within said prescribed value, the control unit alters VC1 and makes the reflection coefficient smaller.
Inventors:
NAKAMURA MANABU (JP)
FUJIMOTO NAOYA (JP)
KATO NORIKAZU (JP)
OSHIDA YOSHIYUKI (JP)
TAKAHASHI NAOTO (JP)
FUJIMOTO NAOYA (JP)
KATO NORIKAZU (JP)
OSHIDA YOSHIYUKI (JP)
TAKAHASHI NAOTO (JP)
Application Number:
PCT/JP2015/055197
Publication Date:
September 03, 2015
Filing Date:
February 24, 2015
Export Citation:
Assignee:
HITACHI INT ELECTRIC INC (JP)
International Classes:
H05H1/46; H01L21/3065; H01P5/04; H03H7/38; C23C16/52
Domestic Patent References:
| WO2005057993A1 | 2005-06-23 |
Foreign References:
| JP2009124687A | 2009-06-04 | |||
| JP2006139949A | 2006-06-01 | |||
| JP2011124191A | 2011-06-23 | |||
| JP2003318689A | 2003-11-07 | |||
| JP2010045664A | 2010-02-25 |
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