Title:
MATCHING CIRCUIT, SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2020/245696
Kind Code:
A1
Abstract:
Provided is a matching circuit that can cope with a plurality of frequencies. The matching circuit comprises a transistor and an inductor. The matching circuit uses, as a capacitor, the capacitance (hereinafter referred to as capacitance Cgsd) formed between the source and drain and the gate of the transistor, and the capacitance Cgsd has the characteristic of changing according to a gate-to-source voltage (hereinafter referred to as voltage Vgs). The transistor included in the matching circuit is an OS transistor having a metal oxide in a channel forming region. The OS transistor has a feature in which the amount of change in the capacitance Cgsd with respect to the voltage Vgs is larger than that of a silicon-based MOS FET, so that the matching circuit can cope with an AC signal in a wide frequency range.
Inventors:
KUNITAKE HITOSHI (JP)
OHSHIMA KAZUAKI (JP)
OHSHIMA KAZUAKI (JP)
Application Number:
PCT/IB2020/054927
Publication Date:
December 10, 2020
Filing Date:
May 25, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L27/06; H01L21/822; H01L27/04; H01L27/088; H01L29/786; H03H7/38
Domestic Patent References:
| WO2015097804A1 | 2015-07-02 | |||
| WO2017002196A1 | 2017-01-05 |
Foreign References:
| JP2008218989A | 2008-09-18 | |||
| JP2011139049A | 2011-07-14 | |||
| JP2015508621A | 2015-03-19 |
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