Title:
INPUT/OUTPUT MATCHING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2015/132958
Kind Code:
A1
Abstract:
Provided is an input/output matching circuit, which maintains electrostatic resistance by means of ESD elements, and which, at the same time, has high-speed communication performance without being affected by noise.
In the present invention, a plurality of ESD elements having different frequency characteristics, and elements thereof are connected to each other by means of coils, thereby constituting a matching circuit of the ESD elements and the coils.
Inventors:
KOGO KENJI (JP)
KAWAMOTO TAKASHI (JP)
KAWAMOTO TAKASHI (JP)
Application Number:
PCT/JP2014/055981
Publication Date:
September 11, 2015
Filing Date:
March 07, 2014
Export Citation:
Assignee:
HITACHI LTD (JP)
International Classes:
H04L25/02; H03H7/38; H04B3/02
Foreign References:
| US20120314328A1 | 2012-12-13 | |||
| JP2005521297A | 2005-07-14 |
Attorney, Agent or Firm:
SEIRYO I. P. C. (JP)
青稜 patent business corporation (JP)
青稜 patent business corporation (JP)
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