Title:
MATRIX CAPACITOR BOARD AND CHIP TEST METHOD
Document Type and Number:
WIPO Patent Application WO/2019/153343
Kind Code:
A1
Abstract:
Provided are a matrix capacitor board and a chip test method, the matrix capacitor board comprising: a plurality of first signal lines, a plurality of second signal lines, and a capacitor matrix formed by capacitors disposed at intersections of each of the first signal lines and each of the second signal lines, wherein the capacitor matrix comprises at least two kinds of capacitors. The chip test method comprises: disposing capacitors having at least two kinds of capacitance values in a capacitor matrix of a matrix capacitor board, thereby having a function of being capable of simulating a normal state (i.e. an untouched state) and a touched state, and being capable of implementing the testing of different performance conditions of a chip based on the function of the matrix capacitor board.
Inventors:
LIN RONGWA (CN)
LI LONGBIN (CN)
LI LONGBIN (CN)
Application Number:
PCT/CN2018/076498
Publication Date:
August 15, 2019
Filing Date:
February 12, 2018
Export Citation:
Assignee:
SHENZHEN GOODIX TECH CO LTD (CN)
International Classes:
G01R31/28
Domestic Patent References:
| WO2001067119A1 | 2001-09-13 |
Foreign References:
| CN107238788A | 2017-10-10 | |||
| CN202600083U | 2012-12-12 | |||
| CN102866317A | 2013-01-09 | |||
| US20090250268A1 | 2009-10-08 | |||
| JP2001311757A | 2001-11-09 | |||
| CN102981059A | 2013-03-20 | |||
| CN106093662A | 2016-11-09 |
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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