TECHNICAL FIELD

The present invention is related to the field of nanoelectronics. In particular it is related to a memory storage device comprising Aluminum oxide phosphate [ALPO ~ AI2O3-3X (P0 ₄ )2 _X ]. The invention provides structurally tuned Aluminum oxide phosphate [ALPO ~ Α1 ₂ θ3_3χ (P0 ₄ ) _2x ] with increased intrinsic charge storage and low leakage current. Further, the invention provides a new process to decrease the number densityof the traps by upto 96% with increase in annealing temperature.

BACKGROUND OF INVENTION

Prodigious properties of Aluminum Oxide Phosphate [Α1 ₂ θ3-3χ(Ρθ ₄ ) ₂ χ] (ALPO) renders it to be adopted as a dielectric for application as a gate insulator in various electronic devices. The dielectric is transparent in nature and has wide applications towards optoelectronicsdevices. ALPO already has been used to fabricate a thin film transistor (TFT) with Indium Gallium Zinc Oxide (IGZO)material as a channel layer. Moreover, APLO is an excellent dielectric with extremely low leakage current density; therefore it has been used as trapping and blocking layers in recently reported memory devices.

Today's semiconductor memory technology is dominated by silicon-oxide -nitride-oxide-silicon (SONOS) non-volatile flash memory which is based on intrinsiccharge traps in silicon-rich silicon nitride films depositedby high temperature chemical vapor deposition. Intrinsic charge traps in silicon-rich silicon nitride films are first reported in 1967 and the first flash memory deviceincorporating silicon nitride charge storage is demonstrated in 1980's. Since then, SONOS technology has progressed rapidly and commercial memory chips have been in production for more than a decade now. However, the trap density and distribution is very difficult to control in silicon nitride. Traps can be increased by ion bombardment and plasma-passivation, but the leakage current degrades. Alternate high-k dielectrics such as Ti0 ₂ , Hf0 ₂ , Zr0 ₂ and the like are excellent insulators for transistor applications, but do not have the intrinsic charge trapping properties as silicon nitride. Although Hf0 ₂ has been used to fabricate SONOS type flash memory, the devices required the support of additional dielectric layers which are deposited by sophisticated ultrahigh vacuum techniques with high temperature processing steps. For certain applications, such as large-area cost effective electronics on flexible plastic substrates, it is essential to use solution processed sol-gel dielectrics and semiconductors. For most sol-gel dielectrics, precursor solutions with organic solvents result in poor leakage current which can be improved to some extent by high temperature annealing. The main challenge for solution processed memory devices is to simultaneously achieve deep intrinsic charge traps together with very low leakage current at low processing temperatures in spin coated metal oxides.

The present invention aims to overcome the challenges and disadvantages associated with solution processed memory devices involving Aluminum Oxide Phosphate [Α1 ₂ θ3-3χ(Ρ0 ₄ ) ₂ χ] .

SUMMARY OF INVENTION

Accordingly, the present invention provides two terminal and three terminal memory devices comprising Aluminum oxide phosphate, without tunneling and blocking layer.

The device involves solution processed Aluminum oxide phosphate containing deep level trap states. The trap states are tuned or controlled with processing and/or annealing temperature. A memory device (A) comprising Aluminum Phosphate Oxide film ( 1 ) deposited on a substrate (2) with metal gate terminal (3); wherein the memory is tunable to 96%.

A method of fabrication of memory device (A) comprising Aluminum Phosphate Oxide film ( 1 ) deposited on a substrate (2) with a metal gate terminal (3); wherein the memory is tunable to 96%, said method comprising steps of

a) coating Aluminum Phosphate Oxide solution to form a film on a substrate;

b) optionally coating a semiconductor channel material (4) selected from a group of Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Oxide (In ₂ 03) or amorphous/poly silicon to form a film on the Aluminum Phosphate Oxide film; heating the coated substrate at a temperature ranging from about 130°C to about 350°C for IGZO channel material; preferably at 200°C; and

c) providing metal gate terminals to obtainmemory device (A) comprising Aluminum Phosphate Oxide film (1) deposited on a substrate (2) with a metal gate terminal (3); wherein the memory is tunable to 96%.

BRIEF DESCRIPTION OF FIGURES

Exemplary embodiments of the present invention will become more fully understood from the description and the accompanying figures, wherein:

Figure 1 : Schematic of device structure along with photographs of fabricated devices (a)Two terminal devices on silicon substrate (b) Three terminal devices on silicon substrate (c) Devices on Plastic substrate (for 3 -terminal flexible memory devices).

Figure2: Demonstration of traps in low temperature annealed ALPO film along with the memory performance characteristics of two-terminal devices. Figure 3 demonstration of memory effect in three -terminal ALPO/IGZO devices annealed at low temperature (200 °C) along with a control device with negligible traps annealed at high temperature (800 °C). Inset figures show device schematic and electron microscope cross-section image.

Figure 4:The effect of measurement frequency and voltage amplitude on the CV hysteresis caused by trap states in two-terminal 200 °C annealed ALPO devices. Also shown is a plot of leakage current of the film.

Figure 5: Demonstration of tunability of trap states in ALPO by a change in the hysteresis window for ALPO films annealed at different temperatures.

Figure 6: provides the optical property of ALPO precursor solution measured by UV -Visible spectroscopy- (a) The optical property of ALPO with different concentration (molarity) with P/A1=0.5, (b) With fixed molarity = 0.5 with different concentration of P/Al.

DETAILED DESCRIPTION OF INVENTION

The foregoing description of the embodiments of the invention has been presented for the purpose of illustration. It is not intended to be exhaustive or to limit the invention to the precise form disclosed as many modifications and variations are possible in light of this disclosure for a person skilled in the art in view of the description. It may further be noted that as used herein, the singular "a" "an" and "the" include plural reference unless the context clearly dictates otherwise. Unless defined otherwise, all technical and scientific terms used herein have the same meanings as commonly understood by person skilled in the art.

The present invention is in relation to a memory device (A) comprising Aluminum Phosphate Oxide film (1) deposited on a substrate (2) with metal gate terminal (3); wherein the memory is tunable to 96%. In an embodiment of the present invention, the device (A) is a two terminal or three metal gate terminal device.

In an embodiment of the present invention, the three terminal device comprises coating of a semiconductor channel material (4)selected from a group of Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Oxide (ln ₂ 0 ₃ ) and amorphous/poly silicon with metal gate terminal, deposited on Aluminum Phosphate Oxide film(3).

In an embodiment of the present invention, the metal of gate terminal (3) is selected from a group comprising Aluminum, Copper, Silver, Gold, and Chromium.

In an embodiment of the present invention, the substrate (2) is selected from a group comprising silicon wafer, flexible metal films wherein metal is selected from a group comprising aluminum, gold, platinum, copper and stainless steel, and polymer film.

In an embodiment of the present invention, the polymer film is selected from a group comprising Polyimide, Polyethylene terephthalate and Kapton.

In an embodiment of the present invention, the memory is tuned by annealing the film between temperature from 25 °C and 1000 °C.

The present invention is also in relation to a method of fabrication of memory device (A) comprising Aluminum Phosphate Oxide film (1) deposited on a substrate (2) with a metal gate terminal (3); wherein the memory is tunable to 96%, said method comprising steps of

a) coating Aluminum Phosphate Oxide solution to form a film on a substrate;

b) optionally coating a semiconductor channel material (4)selected from a group of Indium

Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Oxide (ln ₂ 0 ₃ ) or amorphous/poly silicon to form a film on the Aluminum Phosphate Oxide film; heating the coated substrate at a temperature ranging from about 130°C to about 350°C for IGZO channel material; preferably at 200°C; and

c) providing metal gate terminals to obtain memory device (A) comprising Aluminum Phosphate Oxide film (1) deposited on a substrate (2) with a metal gate terminal (3); wherein the memory is tunable to 96%.

In an embodiment of the present invention, the Aluminum Oxide solution is of concentration ranging from 0.1M to 1M, preferably 0.5M.

In an embodiment of the present invention, theAluminum Oxide Phosphate solution is prepared by a method comprising steps of

A) dissolving Aluminum hydroxide in water to form a mixture;

B) adding hydrochroric acid and phosphoric acid to the mixture;

C) stirring the solution at a temperature ranging from 70 ^° C to 95 ^° C, preferably at 90 ^° C for a period ranging from 1 Oh to 72 h; and

D) optionally altering the concentration to obtain the Aluminum Oxide Phosphate solution.

In another embodiment of the present invention, the semiconductor is IndiumGallium Zinc Oxide solution is ranging from 0.1M to 1M metal ion concentration, preferably 0.4 M of metal ion concentration.

In another embodiment of the present invention, the Indium Gallium Zinc Oxide solution is prepared by a method comprising steps of

A. dissolving Indium nitrate hydrate [In(N0 ₃ ) ₂ ,xH ₂ 0], Gallium nitrate [Ga(N0 ₃ ) ₂ , xH ₂ 0], and zinc nitrate hydrate [Zn(N0 ₃ ) ₂ , xH ₂ 0] in a solvent selected from a group comprising ethanol, 2-Methoxy-ethanol to obtain the solution of Indium Gallium Zinc Oxide; and

B. adjusting the concentration to obtain the solution of Indium Gallium Zinc Oxide. The present invention provides a solution process to develop a memory device with tunable/controllable storage property and controllable trap states in Aluminum Oxide Phosphate [Α1 ₂ θ3-3χ(Ρ0 ₄ ) ₂ χ]. The unprecedented controllability in memory allows designing of memory or switching devices that has the potential to operate from -25°Cupto 180°C.The sensitivity of the traps is controllable/tunable independently and systematically by up to 96% with increase in annealing temperature.

An embodiment of present invention provides inorganic dielectric Aluminum Oxide Phosphate [ALPO ~ Α1 ₂ θ3_3χ (P0 ₄ ) _2x ] film (1) annealed at 200 ^° C or below with significant number of intrinsic charge storage (> 10 12 cm ^— 2 ) together with low leakage current (< 10 ~1 Acm ~ 2 ) in the fabrication of robust memory devices (Two terminal capacitive and three terminal memory -TFT) without tunneling and blocking layer.

The figure l(a-c) provide the schematic architecture of two terminal and three terminal memory deviceswithout the tunneling and blocking layer, of present invention. Also shown in the figures are photographs of actual fabricated devices on silicon and flexible polymer substrates. Accordingly, the two terminal device comprises Aluminum Phosphate Oxide film (1) deposited on a substrate (2) with metal gate terminal (3) and the three terminal device comprises a layer of semiconductor channel material (4)selected from a group comprising, Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Oxide (In ₂ 0 ₃ ) or amorphous/poly silicon with metal gate terminal, deposited on Aluminum Phosphate Oxide film. The metal is selected from a group comprising Aluminum, Copper, Silver, Gold, and Chromium. The performance of the two-terminal 200° C temperature annealed ALPO made device memory devices are evaluated with respect to four key industry parameters i.e. retention, endurance, speed, temperature and the results are depicted in figure 2. Figure 2(a) shows the CV hysteresis of device prepared in the year 2012, measured using an impedance meter. Figure 2(b) shows the high-speed measurement performed with the high-speed CV measurement technique on the same device in the year 2017, accordingly very less degradation is found in the memory devices after 5 years. Figure 2(c) shows the memory window of the two terminal capacitive memory devices where the ALPO is annealed at 200°C for one hour. The speed of the memory devices is approximately 200ms. Figures 2(d) and 2(e) demonstrates the endurance measurement and retention window at about 25 °C. The inset of 2(e) demonstrates the retention characteristics of memory devices after the endurance cycle of 10 ⁴ . A negligible memory loss in room temperature as well as high temperature operation is observed as shown in figure 2(f).

Three terminal memory devices in figure 3-

Further, the two-terminal ALPO memory stack can be embedded into a complete three -terminal thin film transistor (TFT) in which all the active layers are solution processed. The three -terminal memory TFT with IGZO channel layer and ALPO memory layer exhibits memory hysteresis in the Id-Vg characteristics as expected. Further, by changing the ALPO annealing temperature, the number of traps and memory hysteresis can be drastically changed due to the tunability of the ALPO. This demonstrates a process tunable memory device which is unique to ALPO and especially useful for memory technology.

As a practical application of the tunable charge storage properties of ALPO, fully solution processed TFTs on heavily doped silicon (as back-gate) using solution processed ALPO as the gate dielectric and solution processed indium gallium zinc oxide (IGZO) as the channel layer is processed (Figure3) The IGZO channel layer is deposited on as prepared ALPO film (Type-I, Fig 3a) as well as on 800 C annealed film(Type-II, Fig 3b) by spin-coating in ambient conditions. After deposition, both devices are annealed further at 350 C for 3 hours. The thickness of the solution processed ALPO gate dielectric is 203 nm, measured by cross-sectional SEM (Inset of Fig. 3b) and verified by ellipsometry. A hysteresis window of 9.6 V (in Id - V _g with Vd = 5 V) in Type-I devices (W=25 μπι and L=10 μπι) isobserved by sweeping the gate voltage from -10 to +30V and back (Fig. 3a). With Δν _ώ ~ 9.6 V at I _d ~ 50 pA(V _d ~ 5 V), the

12 ~~ 2

trapped charge density (n _memoIy -TFT) is~ 2.51x 10 cm . In addition, the stability of the hysteresis window is tested by using different drain voltages. No significant degradation of hysteresis window with increase in drain voltage is observed. The Type-II device with high temperature annealed ALPO showed no hysteresis as expected. The threshold voltage Vth remained very close to zero for both directions of the sweep, which is useful for low voltage switching applications.

The processed ALPO film and the memory device comprising it exhibit the following properties that allow a significant advancement in the existing technology for memory/switches:

a) ULTRA LARGE MEMORY WINDOW:

The high density of intrinsic electronic traps in insulating low temperature solution processed

ALPO translates into a memory window of 50% of the sweep voltage (at +/- 15 V).

b) CONTROLLABLE TRAP PROPERTY:

The intrinsic traps in solution processed ALPO can be adjusted precisely by 96% by changing the film annealing temperature from about 25°C to about 1000°C. c) ROBUST MEMORY DEVICE FABRICATED AT BELOW 200°C:

The performance of ALPO memory devices is 10000 times better than any polymer made solution processed device. For example, the polymer device reported by Faber et. al (Advanced Materials 2009, 21, 3099-3104, DOI 10.1002/adma.200900440) shows a retention upto 20 minute and endurance upto 40 cycles. Another device reported by Park, Y. and Lee, J. (Advanced Materials 2015,27, 706-71 1, DOI 10.1002/adma.201404625) shows a retention upto5 seconds without endurance data.

In comparison, the devices disclosed here show retention more than 10 ⁴ seconds and endurance more than 10 ⁴ cycles. In addition, flash memory can also be in operation in high temperature region (>100°C)(figure 2(f)).

d) ROBUST MEMORY WITHOUT TUNNELING AND BLOCKING LAYER:

The ALPO made flash memory can remember the information for more than experimental measurement limits (figure 2(e) shows no degradation in memory window upto 10 ⁴ cycles which is experimental measurement limit).

e) MEMORY DEVICE STRUCTURAL ENGINEERING:

The present invention offers a structurally different back-gated fully-solution processed flash memory device which is useful for large area, cost-effective, robust electronics applications. The charge traps memory FET are functional without additional dielectric blocking layer. Additionally, no disturbance in the memory window is observed due to change in drain bias. The capacitance -voltage (CV) measurements are carried out on metal insulator semiconductor (MIS) structures fabricated on low doped silicon substrate with metal gate. The figures 4(a-c) shows the voltage, frequency response and leakage current of traps of a 3 layered film device. A large memory window corresponding to a significant density of trap charges is observed as shown in Fig. 4(a) of the CV at different frequencies from 10kHz to 1MHz. It is seen that there is no variation of AVFB observed with change in frequency. There is no change in hysteresis for different measurement frequencies, indicating robustness of the trap states. The width of the hysteresis depends on the competition between trap filling and charge loss. As the sweep voltage increases (Fig. 4(b)), larger electric field causes more charge injection into the traps. Hence the hysteresis width increases initially for DC sweep voltage. The hysteresis in CV from 200 ^° C annealed ALPO MIS structure with different sweep voltages (at a fixed AC frequency and amplitude of 100 kHz and lOOmV respectively) from ± 5V to 30V. The up-down arrows show a maximum AVFB of 17.5 V at ± 20 V gate sweep. It is known fact that the leakage current density of the memory stack should be less than 10 ^"6 Acm ² (at 1MV cm ^"1 ) to obtain a high-performance memory device. The ALPO film of present invention shows an extremely low leakage current density compared with other solution processed inorganic dielectrics.

The figure 4(c) shows the leakage current density (J) as a function of electric field (E) has been measured for 139 nm ALPO film annealed at 200 C for one hour. The measured J at 1 MVcm ¹ is 8.2x10 ^"8 Acm ^"2 .

Three layered films annealed at different temperatures are tested for electrical defects by CV measurements. A large flat band voltage window (AVFB) is observed for the low temperature annealed ALPO film(below 400 C). Figures 5a, b, c, d and e illustrate the hysteresis for as prepared, 200 C, 400 C, 600 C and 800 C annealed(for 1 hour) films, respectively. The voltage is swept from -20V to +20V and back with a rateof 2V/min. It is also observed that the trap charges in the ALPO decreases with the decrease ofsweep voltage (Fig. 5f, Sweep voltage— 10V to +10V). The statistics of the trap charges in ALPOis shown in the Table 2.

TABLE 2: DEFECT ANALYSIS OF ALPO

*The sweep voltage ±10V

Thus, solution processed ALPO films processed at low temperature exhibit a significant number of robust electron traps which are responsible for the large hysteresis observed in the capacitance-voltage characteristics. In addition, the films show very low leakage currents. The simultaneous presence of two conflicting properties i.e. large trap density and low leakage current, in a dielectric film is unique to ALPO and essential for high performance memory devices.

The memory window depends systematically and reproducibly on the annealing temperature of the ALPO film. Figure 5 shows the charge trapping for 3 -layer ALPO annealed at different temperatures. The observed hysteresis in CV from (a) As prepared (AP), (b) 200°C, (c) 400°C, (d) 600°C, (e) 800°C and (f) 1000°C annealed (1 hour) ALPO insulator. A large hysteresis window is observed for the as prepared (AP) film which corresponds to a high trap density. The maximum hysteresis is observed in ALPO film annealed at 200 ^° C for one hour. However, when the annealing temperature increases to 400 C, the hysteresis dramatically decreases. A minimum hysteresis is observed for the film annealed at 800 C which corresponds to a reduction in trap density of 96% from the low temperature value. The trap density observed in ALPO films can be changed easily by annealing the film at different temperatures. The high temperature annealed film shows a reduction in trap density by 96% compared to the low temperature film. This demonstrates that the traps are tunable i.e., their number can be controlled by processing conditions. Such tunability of traps with processing temperature is unique to ALPO films and essential for optimizing memory devices.

The optical property of precursor solutions is characterized by UV-visible spectroscopy.lt is found that there is no absorption within the visible region. There is one absorption peak in UV region at 235nm with absorption energy Ep= 5.3 eV( which indicates that the material properties can be affected by UV radiation instead of thermal annealing). The figure 6a and 6b provides the optical property of ALPO with different concentration (molarity) for a fixed P/A1=0.5, and with fixed molarity = 0.5 for different P/Al ratios respectively. This shows that optically transparent precursor solutions can be prepared under a wide range of experimental conditions. Experimental:

A. PREPARATION OF PRECURSOR SOLUTIONS

Aluminum Oxide Phosphate precursor solution in water is prepared by dissolving Al(OH) ₃ powder (Alfa, assay 78%) in deionized water (18ΜΩ resistivity). Then HC1 (ThermoFisher, assay 36.9%) is added followed by the addition of H ₃ P0 ₄ (aq, ThermoFisher, assay 90.5%). The solution is stirred (at about 90 ^° C) in a water bath for 24 hours.

The IGZO precursor solution is prepared by dissolving indium nitrate hydrate [In(N0 ₃ ) ₂ ,xH ₂ 0], gallium nitrate [Ga(N0 ₃ ) ₂ , xH ₂ 0], and zinc nitrate hydrate [Zn(N0 ₃ ) ₂ , xH ₂ 0] in 2- Methoxyethanol. B. CHEMICAL COMPOSITION VARIATION OF PRECURSOR SOLUTION The metal ion concentration (molarity) of the ALPO precursor solution can be changed from 0.1 to 1M for a given phosphorous to aluminum (P/Al) ratio. In addition, for each molarity, the composition of ALPO [Αΐ2θ3_3 _Χ (Ρθ4)2 _Χ ] can be changed. In this formula, "x" refers to the ratio of phosphorous to aluminum (P/Al ratio) which can be optimized from 0.1 to 1 depending on the requirement for each film thickness. The changes in molarity and P/Al ratio are accomplished by altering the volume of the components mixed for a given total solution volume. The molarity of the IGZO precursor solution can also be changed from 0.1M to 1M. FABRICATION OF MEMORY DEVICE

General Procedure:

A. Two Terminal Devices: Two terminal MIS structures are fabricated on piranha cleaned [H ₂ S0 ₄ :H ₂ 02 = 3: 1] lightly doped silicon substrate (p— Si). The ALPO solution of concentration ranging from about 0.1M to 1M is spin-coated at 3000 rpm for 30s to form the gate dielectric. The films are then thermally irradiated at 150 C for 1 min. This process is repeated for2-3 times to achieve the desired thickness. The sample is exposed to oxygen plasma for 5 to 10 min at 0.5 mbar pressure before deposition of each layer. For control devices the film is further thermally irradiated at 800 ^° C for one hour in ambient to achieve the defect free oxide. The 200 nm aluminum gate is deposited by thermal evaporation at about 10 ⁶ mbar pressure. Before deposition of the top aluminum gate, the ALPO films are thermally irradiated at different temperature in a preheated furnace for one hour. All devices are stored under ambient conditions and no degradation of CV curves is found even after three years.

B. Three Terminal Devices: The fully solution processed spin-coated TFTs are fabricated on highly doped p++-Si as well as metal coated (Gate) plastic substrates as back gate. The IGZO film is deposited by spin-coating and thermally irradiated initially for 5 min at 300 ^° C followed by a longer thermal irradiation for 3 hours at 350 C. The isolation of channel layer is done by UV lithography (45 mJcm ) using a AZ5214 photoresist mask (spin-coated at 4000 rpm for 40 sec, dried 120 ^° Cfor lmin and developed, followed by an thermal irradiation step of 120 C for 3 min). The selective IGZO channel area is etched with 35% of perchloric acid, followed by removal of AZ5214 with acetone, rinse with DI water and heat treatment on a hot plate at 250 ^° C for 10 min. The Mo (200 nm) is sputtered and lifted off to form the source (S) and drain (D). Finally, the device is placed on the hot plate at 250 ^° Cfor 10 min to remove moisture.

C. VARIATION OF ALPO LAYER THICKNESS

The thickness of each ALPO layer can be varied from 5nm onwards depending on the molarity of the precursor solution, spin-coating speed and annealing temperature. The total device layer thickness can be increased by spin-coating multiple layers, for example, two layers or three layers. The table 1 below shows the device thickness in nm for 2-layer and 3-layer ALPO films annealed at different temperatures.

Table 1 device thickness annealed at two different temperatures

EXAMPLE 1 :

The Aluminum Oxide Phosphate precursor solution in water is prepared by dissolving 346mg Al(OH) ₃ powder (Alfa, assay 78%) in 23.32ml deionized water ( 18ΜΩ resistivity). Then 2.147ml HCl(ThermoFisher, assay 36.9%) is added followed by the addition of 0.173ml H ₃ P0 ₄ (aq, ThermoFisher, assay 90.5%). The solution is stirred at 90 ^° C in a water bath for 24 hours. The P/Al ratio obtained is 0.25 with molarity 0.5M. The solution is spin-coated on silicon substrate at 3000rpm and annealed at 800C. This provided a film thickness of 28nm.

EXAMPLE 2:

The Aluminum Oxide Phosphate precursor solution in wateris prepared by dissolving 346mg Al(OH) ₃ powder (Alfa, assay 78%) in 23.15ml deionized water (18ΜΩ resistivity). Then 2.147ml HC1 (ThermoFisher, assay 36.9%) is added followed by the addition of 0.340ml H ₃ P0 ₄ (aq, ThermoFisher, assay 90.5%). The solution is stirred at 90 ^° C in a water bath for 24h. The P/Al ratio obtained is 0.5 with molarity 0.5M. The solution is spin-coated on silicon substrate at 3000rpm and annealed at 800C. This provided a film thickness of 38nm per layer. After spin- coating three times, a 3-layer film is obtained with thickness of 105nm. The CV characteristics showed a hysteresis of 0.7V (figure 5e).

EXAMPLE 3:

The IGZO precursor solution is prepared by dissolving 288.796mg indium nitrate hydrate [In(N0 ₃ ) ₂ ,xH ₂ 0], 173.903mg gallium nitrate hydrate [Ga(N0 ₃ ) ₂ , xH ₂ 0], and 681.84mg zinc nitrate hydrate [Zn(N0 ₃ ) ₂ , xH ₂ 0] in 4ml volume of 2-Methoxyethanol. This provided 0.24 M of indium nitrate, 0.17M gallium nitrateand 0.19M of zinc nitrate concentrations in the final solution. The solution is spin-coated 3000rpm, 30sec and annealed at 350C for 3 hours to obtain IGZO film thickness of 32nm.

Thus, the present invention provides a promising material, Aluminum oxide phosphate (ALPO) -

- containing deep level trap states, wherein the trap states are tunable/controlled up to 96%.

- fully solution processed, low leakage, low temperature processed (< 200°C) inorganic precursor based two terminal and three terminal memory devices without annealing, tunnelling and blocking layer; based on aforementioned ultra-high trap based dielectric ALPO. The devices promise an ultra -long non-degradable memory window even under high temperature of 125°C. The invention can bring about a revolution in the domain of electronics with the cost-effective approach of processing highly efficient memory devices, which could lead to important advances in plastic electronics.