Title:
MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2016/038991
Kind Code:
A1
Abstract:
According to an embodiment of the present invention, a memory device includes first to third layers. The first layer includes a plurality of first wiring lines, and a first insulating portion. The first wiring lines extend in a first direction. The first insulating portion is provided between the first wiring lines. The second layer is at a distance from the first layer. The second layer includes a plurality of second wiring lines and a second insulating portion. The second wiring lines extend in a second direction that intersects with the first direction. The second insulating portion is provided between the second wiring lines. The third layer is provided between the first and second layers. The third layer includes a ferroelectric portion and a paraelectric portion. The ferroelectric portion is provided between the first and second wiring lines and has variable resistance. The paraelectric portion is provided between the first insulating portion and the second wiring lines, between the second insulating portion and the first wiring lines, and between the first and second insulating portions.
Inventors:
FUJII SHOSUKE (JP)
ISHIKAWA TAKAYUKI (JP)
ISHIKAWA TAKAYUKI (JP)
Application Number:
PCT/JP2015/069052
Publication Date:
March 17, 2016
Filing Date:
July 01, 2015
Export Citation:
Assignee:
TOSHIBA KK (JP)
International Classes:
H01L27/105; H01L21/8246; H01L45/00; H01L49/00
Foreign References:
| JP2000216349A | 2000-08-04 | |||
| JP2014053571A | 2014-03-20 | |||
| US20120091427A1 | 2012-04-19 |
Attorney, Agent or Firm:
HYUGAJI, MASAHIKO (JP)
Masahiko Hiugaji (JP)
Masahiko Hiugaji (JP)
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