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Title:
MEMORY DEVICE, AND METHOD FOR MANUFACTURING MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/221114
Kind Code:
A1
Abstract:
A memory device according to an embodiment of the present disclosure comprises a logic circuit in which a plurality of wiring layers including layers that have different wiring pitches are laminated, and a memory element provided between the plurality of wiring layers.

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Inventors:
SUMINO JUN (JP)
TAZAKI MASAYUKI (JP)
FUKATA HIDEYUKI (JP)
Application Number:
PCT/JP2018/017405
Publication Date:
December 06, 2018
Filing Date:
May 01, 2018
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L21/8239; H01L27/105; H01L45/00; H01L49/00
Domestic Patent References:
WO2010079816A12010-07-15
WO2009081595A12009-07-02
Foreign References:
JP2008091519A2008-04-17
JP2013239728A2013-11-28
Attorney, Agent or Firm:
TSUBASA PATENT PROFESSIONAL CORPORATION (JP)
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