MEMORY DEVICE

WIPO Patent Application WO/2021/028770

A1

A memory device having high reliability is provided. A first conductor that extends in a first direction has provided on a side surface thereof, a first insulating body, a first semiconductor, a second insulating body, a second semiconductor, and a third insulating body, in said order as viewed from the first conductor side. A first region and a second region are provided in the first conductor, said first region overlapping a second conductor via the first insulating body, the first semiconductor, the second insulating body, the second semiconductor, and the third insulating body, and said second region overlapping a third conductor via the first insulating body, the first semiconductor, the second insulating body, the second semiconductor, and the third insulating body. A fourth conductor is provided in the second region, between the first insulating body and the first semiconductor.

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YAMAZAKI SHUNPEI (JP)
KIMURA HAJIME (JP)
MATSUZAKI TAKANORI (JP)
ONUKI TATSUYA (JP)
OKAMOTO YUKI (JP)
UOCHI HIDEKI (JP)
OKAMOTO SATORU
GODO HIROMICHI (JP)
TSUDA KAZUKI (JP)
KUNITAKE HITOSHI (JP)

PCT/IB2020/057246

February 18, 2021

July 31, 2020

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SEMICONDUCTOR ENERGY LAB (JP)

H01L21/8234; H01L21/336; H01L21/8239; H01L21/8242; H01L27/06; H01L27/088; H01L27/105; H01L27/108; H01L27/11548; H01L27/11556; H01L27/1156; H01L27/11582; H01L29/786; H01L29/788; H01L29/792

JP2014160535A	2014-09-04
JP2019008862A	2019-01-17
JP2018207038A	2018-12-27
JP2018157208A	2018-10-04

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