Title:
MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/037883
Kind Code:
A1
Abstract:
In the present invention, an upper bit-line (BL_A) extends in a Y-direction in an upper memory array (1A) and a Y-decoder (3), and a lower bit-line (BL_B) extends in the Y-direction in a lower memory array (1B) and the Y-decoder. The Y-decoder has: an upper Y-line selection switch (YS_A) connected to the upper bit-line; and a lower Y-line selection switch (YS_B) connected to the lower bit-line and disposed on the other side in the Y-direction with respect to the upper Y-line selection switch. A switch circuit (SWC) is configured to be able to switch between conduction between a sense amplifier (SA) and the upper Y-line selection switch and conduction between the sense amplifier and the lower Y-line selection switch.
Inventors:
IMAI TAKEHARU (JP)
KUBO TENGAI (JP)
KUBO TENGAI (JP)
Application Number:
PCT/JP2022/032028
Publication Date:
March 16, 2023
Filing Date:
August 25, 2022
Export Citation:
Assignee:
ROHM CO LTD (JP)
International Classes:
G11C16/24; G11C5/02; G11C7/06; G11C7/12; G11C16/26
Foreign References:
| JPS6120298A | 1986-01-29 | |||
| JP2019121408A | 2019-07-22 |
Attorney, Agent or Firm:
SANO PATENT OFFICE (JP)
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