Title:
MEMORY DEVICES HAVING VERTICAL TRANSISTORS AND METHODS FOR FORMING THEREOF
Document Type and Number:
WIPO Patent Application WO/2023/029142
Kind Code:
A1
Abstract:
In certain aspects, a memory device includes a semiconductor layer, a peripheral circuit including a peripheral transistor in contact with the semiconductor layer, an array of memory cells disposed beside the semiconductor layer and the peripheral circuit, and bit lines coupled to the memory cells. Each of the memory cells includes a vertical transistor extending in a first direction, and a storage unit coupled to the vertical transistor. Each of the bit lines extends in a second direction perpendicular to the first direction. A respective one of the bit lines and a respective storage unit are coupled to opposite ends of each one of the memory cells in the first direction.
Inventors:
YANG SIMON (CN)
ZHU HONGBIN (CN)
LIU WEI (CN)
HUA WENYU (CN)
ZHU HONGBIN (CN)
LIU WEI (CN)
HUA WENYU (CN)
Application Number:
PCT/CN2021/122022
Publication Date:
March 09, 2023
Filing Date:
September 30, 2021
Export Citation:
Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
G11C8/14
Foreign References:
| US20210028176A1 | 2021-01-28 | |||
| CN113192955A | 2021-07-30 | |||
| CN113241347A | 2021-08-10 | |||
| CN113314422A | 2021-08-27 | |||
| CN112838087A | 2021-05-25 | |||
| US20210028308A1 | 2021-01-28 |
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
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