Title:
MEMORY MANAGEMENT UNIT, IMAGE PROCESSING DEVICE, AND INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2012/014475
Kind Code:
A1
Abstract:
A control unit (120) dynamically determines a bank to be accessed among p-pieces of banks contained in a DRAM (200). When a predetermined condition relating to the allocation state of the DRAM (200) is satisfied, and an unused bank is present, the control unit (120) performs a power consumption reduction process to control the DRAM (200) so that the power consumption of the unused bank becomes lower than the power consumption of the banks other than the unused bank.
Inventors:
MUROYAMA TAKASHI
TOKIEDA MIHO
TAKADA SHINICHI
YAMADA KOJI
TOKIEDA MIHO
TAKADA SHINICHI
YAMADA KOJI
Application Number:
PCT/JP2011/004270
Publication Date:
February 02, 2012
Filing Date:
July 28, 2011
Export Citation:
Assignee:
PANASONIC CORP (JP)
MUROYAMA TAKASHI
TOKIEDA MIHO
TAKADA SHINICHI
YAMADA KOJI
MUROYAMA TAKASHI
TOKIEDA MIHO
TAKADA SHINICHI
YAMADA KOJI
International Classes:
G06F12/06; G06F12/00
Foreign References:
| JPH09212416A | 1997-08-15 | |||
| JP2001101067A | 2001-04-13 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house Extensive 守 (JP)
New house Extensive 守 (JP)
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Claims:
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