Title:
MEMORY AND READING, WRITING AND ERASING METHOD THEREOF
Document Type and Number:
WIPO Patent Application WO/2023/035512
Kind Code:
A1
Abstract:
A memory and a reading, writing and erasing method thereof. The memory 10 comprises H storage surfaces 100 arranged in parallel along a first direction; each storage surface 100 extends in a second direction, and comprises M columns of storage strings 110; each column of storage strings 110 extends in a third direction; the first direction, the second direction, and the third direction are different; H and M are both integers greater than zero; each column of storage strings 110 comprises: N rows of memristor storage units 120; the memory 10 is further provided with a word line 200, a gating transistor 400, a gating line 500, a bit line 300 and a common source line 600; the memristor storage units 120 in the last rows corresponding to all the storage strings 110 are connected to the common source line 600; the common source line 600 is connected to a reference potential 12 by means of a reference resistor 11. The use performance of the memory 10 can be improved.
Inventors:
GUO LINGYI (CN)
SHEN LING (CN)
LI CHEN (CN)
DUAN JIEBIN (CN)
YU XUERU (CN)
SHEN LING (CN)
LI CHEN (CN)
DUAN JIEBIN (CN)
YU XUERU (CN)
Application Number:
PCT/CN2021/143848
Publication Date:
March 16, 2023
Filing Date:
December 31, 2021
Export Citation:
Assignee:
SHANGHAISHANGHAI INTEGRATED CIRCUIT EQUIPMENT & MAT INDUSTRY INNOVATION CENTER CO LTD (CN)
SHANGHAI IC R&D CT CO LTD (CN)
SHANGHAI IC R&D CT CO LTD (CN)
International Classes:
G11C13/00
Foreign References:
CN113707200A | 2021-11-26 | |||
CN101872647A | 2010-10-27 | |||
CN110797063A | 2020-02-14 | |||
CN1503366A | 2004-06-09 | |||
CN101123120A | 2008-02-13 | |||
US9514818B1 | 2016-12-06 |
Attorney, Agent or Firm:
SHANGHAI IFUTURE INTELLECTUAL PROPERTY LAW FIRM (CN)
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