MEMORY, MEMORY TEST METHOD, AND ELECTRONIC DEVICE

WIPO Patent Application WO/2023/102779

A1

The present application relates to the technical field of computer storage, and discloses a memory, a memory test method, and an electronic device. The memory comprises a storage circuit and a test circuit, storage units for storing data being provided in the storage circuit, and the test circuit being used for testing the storage units in the storage circuit. The test circuit may write first test data into a target storage unit of the storage circuit and read first data from the target storage unit in response to a test starting instruction, and compare the first data with the first test data to obtain a first comparison result, the first comparison result being used for indicating whether the target storage unit fails. Because the test circuit is provided in the memory, during testing, the memory can start the internal test circuit to test the storage circuit upon receiving the test starting instruction of a test device, such that occupation of resources of the test device is reduced, and batch testing can be performed on a plurality of memories at the same time, thereby improving the test efficiency.

JP3313102	METHOD FOR SEPARATING CIRCUIT FAULT
JPS6089893	SEMICONDUCTOR DEVICE
JP2001035188	TEST METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

ZHOU XIXIONG (CN)
GUO JINCAN (CN)
HUANG TIANQIANG (CN)
WANG ZHENGBO (CN)

PCT/CN2021/136502

June 15, 2023

December 08, 2021

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HUAWEI TECH CO LTD (CN)

G11C29/12

CN113393887A	2021-09-14
CN113257328A	2021-08-13
CN106816180A	2017-06-09
US20090024885A1	2009-01-22
CN106409343A	2017-02-15
CN108735267A	2018-11-02

TDIP & PARTNERS (CN)

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