Title:
METHOD AND APPARATUS FOR AUTOMATED VALIDATION OF SEMICONDUCTOR PROCESS RECIPES
Document Type and Number:
WIPO Patent Application WO/2012/030930
Kind Code:
A3
Abstract:
Methods and apparatus for automated validation of semiconductor process steps are provided herein. In some examples, a method for validating a semiconductor process recipe includes: selecting a rule set describing an operating window for a semiconductor process tool; checking parameter values defined by steps in the semiconductor process recipe against limit-checking rules of the rule set to produce first results; determining step types from the steps in the semiconductor process recipe using step definition rules of the rule set to produce second results; checking transitions between the step types against step transition rules of the rule set to produce third results; and generating, using the computer, validation data for use of the semiconductor process recipe with the semiconductor process tool based on the first, the second, and the third results.
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Inventors:
HARDY CHARLES (US)
LINDLEY ROGER ALAN (US)
LINDLEY ROGER ALAN (US)
Application Number:
PCT/US2011/049918
Publication Date:
May 18, 2012
Filing Date:
August 31, 2011
Export Citation:
Assignee:
APPLIED MATERIALS INC (US)
HARDY CHARLES (US)
LINDLEY ROGER ALAN (US)
HARDY CHARLES (US)
LINDLEY ROGER ALAN (US)
International Classes:
G06F9/44; G06F19/00
Foreign References:
| US7225047B2 | 2007-05-29 | |||
| US7333871B2 | 2008-02-19 | |||
| US7783375B2 | 2010-08-24 | |||
| US20090143999A1 | 2009-06-04 |
Attorney, Agent or Firm:
TABOADA, Alan (1030 Broad Street Suite 20, Shrewsbury New Jersey, US)
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