METHOD AND APPARATUS FOR CONTROLLING VOLTAGE LINEARITY OF VOLTAGE SOURCE INVERTERS

TECHNICAL FIELD

[0001] The present invention generally relates to voltage source inverters, and more particularly relates to apparatus and methods for controlling the output voltage component of a voltage source inverter.

BACKGROUND OF THE INVENTION

[0002] A variety of controllers are used to control vehicle systems. One example of a vehicle-based controller is an inverter controller. The inverter controller is used to control the vehicle traction drive and numerous other vehicle systems. When using the inverter controller in vehicle systems, it is desirable to minimize current and torque pulsations, particularly at high speeds.

[0003] Discontinuous Pulse Width Modulation (DPWM) methods are commonly employed in inverter controllers to control the fundamental output voltage component of three-phase voltage source inverters. These three-phase voltage source inverters may in turn be used to control the phase currents of three-phase Alternating Current (AC) motors. DPWM methods reduce inverter losses in comparison to continuous Pulse Width Modulation (PWM) methods, such as sinusoidal or space vector modulation.

[0004] In general, a PWM signal has a modulation index that defines the amplitude of the fundamental output voltage component produced by the three-phase voltage source inverter. This modulation index is often defined in terms of a maximum fundamental output voltage that can be produced by the three-phase voltage source inverter. The modulation index (Mi) is given as:

where Vdc is the Direct Current (DC) voltage provided to the three-phase voltage source inverter and V ₁ is a commanded amplitude of the fundamental output voltage component.

[0005] Most PWM methods used with voltage source inverters are susceptible to voltage distortion due to practical limitations of the voltage source inverter, such as inverter lockout time and minimum pulse width constraints. These practical limitations are typically non-linear effects that manifest as finite and controllable minimum and maximum pulse widths. Either inverter switch, for a phase leg, of the voltage source inverter can be indefinitely held "ON" to create discrete values of pulse widths with duty cycles of zero and one, respectively. During some operating conditions, typically at high values of Mi, the commanded duty cycles for a particular phase leg have a pulse width between the minimum and maximum achievable pulse widths and the corresponding discrete values of zero and one. The nonlinear effects produce unachievable regions that occur for each phase of the voltage source inverter (e.g., four times per fundamental cycle). [0006] In the unachievable regions, the inverter control is typically set to clamp the duty cycles at either the maximum pulse width or to one of the voltage rails in a continuously "ON" condition. Analogously, the inverter control may also be set to clamp the duty cycle at either the minimum pulse width or to a lower voltage rail. Either of these conventional settings alters the output fundamental voltage component produced by the voltage source inverter, and the input-output voltage relationship of the modulation index (Mi) becomes non-linear.

[0007] Accordingly, it is desirable to provide a method of controlling a fundamental output voltage component of voltage source inverters that maintains an input-output voltage linearity relationship. Additionally, it is desirable to provide a controller that controls a fundamental output voltage component of a voltage source inverter while maintaining an input-output voltage linearity relationship. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction

with the accompanying drawings and the foregoing technical field and background.

SUMMARY OF THE INVENTION

[0008] Methods and apparatus are provided for controlling a voltage source inverter. In an exemplary embodiment, a method is provided for modifying a signal controlling a voltage source inverter. The method comprises the steps of determining a duty cycle limit of the signal, limiting the signal to the duty cycle limit when a modulation index (Mi) is greater than a minimum modulation index to produce an output signal, and transmitting the output signal to the voltage source inverter. The minimum modulation index indicates a distortion range.

[0009] In another exemplary embodiment, a method is provided for modifying a signal controlling a voltage source inverter comprising the steps of determining a duty cycle for a phase-leg of the signal, clamping the signal at a first potential when the duty cycle is between a first duty cycle limit and a second duty cycle limit indicating a distortion range, clamping the signal at a second potential when the duty cycle is greater than or equal to the second duty cycle limit, clamping the signal at a third potential when the duty cycle is between a third duty cycle and a fourth duty cycle indicating the distortion range, and clamping the signal at a fourth potential when the duty cycle is less than or equal to the fourth duty cycle.

[0010] A voltage source inverter for controlling an inverter load is provided comprising a controller and a switch network having a first input coupled to the controller and having a second input configured to couple to a reference potential. The controller is configured to determine a duty cycle of a first signal, limit the duty cycle at a first duty cycle limit when a modulation index is greater than a minimum modulation index to produce an output duty cycle. The minimum modulation index indicates a distortion range. The switch network is configured to convert the reference potential to a voltage based on the first signal and transmit a second signal having the voltage.

DESCRIPTION OF THE DRAWINGS

[0011] The present invention will hereinafter be described in conjunction with the following drawing figures, wherein like numerals denote like elements, and

[0012] FIG. 1 is a voltage source inverter system in accordance with an exemplary embodiment of the present invention;

[0013] FIG. 2 is the inverter circuit shown in FIG. 1 in greater detail;

[0014] FIG. 3 is an input modulation waveform useful in explaining the operation of the voltage source inverter 10 shown in FIG. 1;

[0015] FIG. 4 is an output modulation waveform useful in explaining the operation of the voltage source inverter 10 shown in FIG. 1; and

[0016] FIG. 5 is a method of controlling a modulation signal for a voltage source inverter in accordance with an exemplary embodiment of the present invention.

DESCRIPTION OF AN EXEMPLARY EMBODIMENT [0017] The following detailed description is merely exemplary in nature and is not intended to limit the invention or the application and uses of the invention. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following detailed description.

[0018] Referring to FIG. 1, a voltage source inverter system 10 is shown in accordance with an exemplary embodiment of the present invention. The voltage source inverter system 10 comprises a controller 32, an inverter circuit 30 coupled to the controller 32, and an Alternating Current (AC) motor 12 coupled to the inverter circuit 30. Generally, the controller 32 has an input configured to receive an input PWM signal having a modulation index (Mj) and modifies the input PWM signal, based on the modulation index (Mj), to produce an output signal that maintains the linearity of the input-output voltage relationship of the voltage source inverter system 10. The inverter circuit 30 receives the output signal from the controller 32 and converts the

output signal to a modulated voltage waveform for operating the ac motor 12. The AC motor 12 may be any conventional AC motor commonly used in automotive vehicles in a number of vehicle systems or subsystems (e.g., a traction drive control system).

[0019] FIG. 2 is the inverter circuit 30 of FIG. 1 in greater detail. The inverter circuit 30 is a three-phase circuit coupled to the AC motor 12. More specifically, the inverter circuit 30 comprises voltage sources (14,16) and a switch network having a first input coupled to the voltage sources (14,16) and an output configured to couple to the AC motor 12.

[0020] The switch network comprises three pairs of series switches with antiparallel diodes (i.e., antiparallel to each switch) corresponding to each of the phases. Each of the pairs of series switches comprises a first switch (18,22,26) having a first terminal coupled to a positive electrode of the voltage source (14,16) and a second switch (20,24,28) having a second terminal coupled to a negative electrode of the voltage source (14,16) and having a first terminal coupled to a second terminal of the first switch (18,22,26), respectively.

[0021] FIG. 3 is an input modulation waveform useful in explaining the operation of the voltage source inverter 10 shown in FIG. 1. For simplicity of explanation, the input modulation waveform is shown and described with respect to the duty cycles associated with the positive half wave of an input modulation signal (e.g., a PWM signal) provided to the voltage source inverter. The input modulation waveform also includes a substantially symmetrical negative half wave for each fundamental cycle of the input modulation signal. Additionally, the positive half wave of the input modulation signal corresponds to a single phase leg of the voltage source inverter. Once the modulation index (M;) increases beyond a value where a commanded duty cycle (d) is greater than a maximum duty cycle limit (d _max ) or less than a minimum duty cycle limit (d _mm ), the input-output voltage relationship of the voltage source inverter may become non-linear.

10022] FlG. 4 is an output modulation waveform useful in explaining the operation of the voltage source inverter 10 shown in FIG. 1. For simplicity of explanation, the output modulation waveform is shown and described with respect to the duty cycles associated with the positive half wave of a modified modulation signal (e.g., a modified PWM signal) provided to the voltage source inverter. To substantially preserve the input-output voltage linearity of the fundamental component of the voltage source inverter, the input modulation waveform shown in FIG. 3 is limited to the maximum duty cycle limit (d _max ) between first and second phase angles (e.g., αi and α ₂ ) of the first positive half of the input modulation waveform (e.g., between about 0 ° and about 90 °). Once the electrical phase angle of the input modulation waveform has reached the second phase angle (α ₂ ), the duty cycle is limited to a reference potential, such as an upper voltage rail. For a second positive half (e.g., between about 90 ° and about 180 °), the input modulation waveform shown in FIG. 3 is similarly limited to d _max at first and second phase angles of the second positive half that are symmetrical about 90 ° to the first and second phase angles ((X ₁ , α ₂ ) of the first half of the positive half of the input modulation waveform. The result of this process is the output modulation waveform shown in FIG. 4. Additionally, this process of limiting the duty cycle in the first and second halves of the positive half wave of the input modulation signal is repeated for the first and second halves of the negative half wave of the input modulation signal.

[0023] A minimum modulation index (Mj _111U1 ) at which this compensation occurs (e.g., modification of the duty cycles of the input modulation waveform) is preferably derived from:

_ d _max + 0.5 M _{i min} φ _k , where d _max is referenced to ± 0.5, as shown in FIGS. 3 and 4, and the factor k is given as:

An over-modulation range corresponding to a maximum modulation index (Mi max) occurs at:

M _{i max} = ^ - 0.907 .

The minimum modulation index (Mj min) and the maximum modulation index (Mi _m a _x ) establish a compensation range (e.g., Mi_min < M; < Mi_ _max ) for possible distortion to the input-output voltage relationship of the voltage source inverter.

[0024] When the modulation index (Mj) is in the distortion range (e.g., Mi _π ii _n < Mi < Mi_ _max ), the first phase angle (αi) is a function of both the modulation index (Mi) and the maximum pulse width and is found by solving

d _max = M ₁ k Sm(CX ₁ ) - 2 - M ₁ k sin^ - -#J .

Once the first phase angle (αi) is known, the second phase angle ((X ₂ ), which is also a function of both the modulation index (M;) and the maximum pulse width, is found by solving

M I ₁ j- k = — [2 M ₁ k π Ci ₁ + 2 M ₁ Cc ₁ + λ/3M _; - 2π] +

^~ 2 π COs(Ci ₁ ) — M ₁ k π sin(2αλ — 2M ₁ sinl 2(X ₁ + T +

^~ d _max [∞s(α_) - cos(α ₂ )] +- COs(O ₂ )

[0025] The value of dcii _P varies with the first and second phase angles (αi, a-i) that in turn vary with the commanded modulation index (M;) and the maximum pulse width. In an exemplary embodiment, the value of d _cU p may be pre-determined and stored (e.g., in a look-up table) for access by the controller 32 (FIG. 1) to determine duty cycles normally provided to the voltage source inverter 10 (FIG. 1). Using this pre-determined value of d _cl i _p for the commanded modulation index (M;), the actual pulses transmitted to the switch network may be modified by the controller 32 (FIG. 1).

[0026] When the commanded modulation index (Mi) is greater than the maximum modulation index(Mi_ _max ), the value of d _oUp can be approximated as:

^•

[0027] Referring to FIGS. 1 and 5, a method of controlling a modulation signal for a voltage source inverter is shown in accordance with an exemplary embodiment of the present invention. The controller 32 determines whether the commanded modulation index (M;) is greater than the minimum modulation index (Mi _nH11 ) at step 105. As previously mentioned, the minimum modulation index (Mi _mm ) indicates a distortion range corresponding to the maximum duty cycle limit (d _max ). In the event that the commanded modulation index (Mj) is less than the minimum modulation index the controller 32 determines the duty cycles for each phase leg of input modulation signal at step 110. For example, for a three-phase voltage source inverter, the controller 32 determines the duty cycles of the phase legs for each of the three phases. After the duty cycles are determined at step 110, the controller 32 transmits an output duty cycle to the inverter circuit 30 at step 135.

[0028] In the event that the commanded modulation index (M;) is greater than the minimum modulation index (Mi_ _m in), the controller 32 determines the duty cycles for each phase leg of the input modulation signal at step 115. After the duty cycles are determined at step 115, the controller 32 determines whether the commanded modulation index (M _; ) is greater than the maximum modulation index (Mi max) at step 120. In the event that the commanded modulation index (Mj) is less than the maximum modulation index (Mi_ _max ), the controller 32 limits the duty cycle to the maximum duty cycle limit d _max with a first set of phase angles (αi , α ₂ ) when the Mi_ _m j _n < Mj < Mj_ _max at step 130. In an exemplary embodiment, the controller 32 clamps the input modulation signal at a first potential when the duty cycle reaches the first phase angle (Ci ₁ ), indicating the maximum duty cycle limit (d _max ), and clamps the signal at a second potential when the duty cycle reaches a second phase

angle (α ₂ ). As previously mentioned hereinabove, the minimum modulation index (Mi_ _m i _n ) is preferably derived from:

_ d _max + 0-5

and the factor k is given as:

π

In an exemplary embodiment, the over-modulation range corresponding to the maximum modulation index (Mi max) occurs at:

M _{i max} = ^β - 0.907 .

The controller 32 limits the duty cycle to the maximum duty cycle limit d _max with a second set of phase angles ((X ₁ , α ₂ ), different from the first set of phase angles, when Mj > M;_ _max at step 125. For example, the controller 32 clamps the input modulation signal at a first potential when the duty cycle reaches the first phase angle (αj.), indicating the maximum duty cycle limit (d _max ), and clamps the signal at a second potential when the duty cycle reaches a second phase angle (α ₂ ) when Mi > Mj _1Uax . In an exemplary embodiment, the second duty cycle limit (d _c u _P ) is determined by:

^"

After the duty cycle is limited at the second duty cycle limit at step 125, the controller 32 transmits the output duty cycle as associated with the modified signal at step 130.

[0029] Although the exemplary embodiment of the method is shown and described with reference to a DPWM signal method, one that is switching loss optimized for a unity power factor load (e.g., DPWMl), the equations representing the various duty cycles may be modified for other DPWM signal methods.

[0030J While at least one exemplary embodiment has been presented in the foregoing detailed description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiment or exemplary embodiments are only examples, and are not intended to limit the scope, applicability, or configuration of the invention in any way. Rather, the foregoing detailed description will provide those skilled in the art with a convenient road map for implementing the exemplary embodiment or exemplary embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the scope of the invention as set forth in the appended claims and the legal equivalents thereof.