Field of the Invention

The present invention relates generally to digital communication systems, and in particular to error correcting methods applied to such systems for providing dynamically variable throughput rates.

Background of the Invention

Wireless digital communication systems are well known in the art. Such communication systems, which typically employ radio frequency (RF) signals to transport information from a first location to a second location, present the system designer with a myriad of technological challenges. In particular, such systems that employ mobile units suffer from various forms of compromised signal quality— e.g. unacceptable levels of average received signal strength, and multi-path fading. Received signal strength varies as a function of distance between the transmitting unit and the receiving unit, differing transmission power among participating communication units, and interference from other transmissions on the same or nearby frequencies. In addition, multi-path fading describes a characteristic that alters the received signal quality as a function of the communication unit's relative movement about the coverage area. Due to movement of the communication unit within the coverage area, the long term average signal quality may vary due to elevation differences of obstructions in the transmitter-receiver path.

Information is typically transmitted over these hostile wireless data communication channels by employing one of a variety of encoding schemes. Such encoding schemes, often referred to as error control codes, inject redundant information elements into the signal. Thus, errors— often due to the propagation problems described above—can be corrected by appropriate processing of the redundant information at the receiving end. For example, FIG. 1 shows a typical data encoding system for encoding information to be transmitted from a data communication unit. Information bits are inputted to a data encoder (102)~e.g., a well known k/n rate convolutional encoder— which then processes the information according to a coding algorithm (e.g., a well known convolutional code). That is, for every k input bits, the encoder (102) produces n encoded output bits, as depicted in FIG. 1 . The ratio of original information to the amount of actual data transferred over the channel— i.e., k/n— is often referred to in the art as the code rate.

After encoding, the encoded information is inputted to a symbol mapper (104) to prepare the data for transmission over the communication channel. In particular, the symbol mapper divides the encoded data into groups of m bits which are then processed to provide modulation symbols. That is, the relationship between a set of m data bits and each of 2 ^m modulation symbols is referred to as a mapping. Well known examples of m-ary symbol mapping include quadrature phase shift keying (QPSK), where m is 2; and 16 quadrature amplitude modulation (16QAM), where m is 4.

Preparation of the output symbols for transmission is carried out by a modulator (not shown in FIG. 1 ). Generally, the modulator requires a minimum channel

bandwidth that depends on the rate of the transmission of the data symbols. For 2-dimensional symbols, the minimum bandwidth is equal to the symbol rate (e.g., the minimum bandwidth required for transmission of 4,000 2- dimensional symbols per second through a channel is 4,000 Hz). It should be noted that in practice, some additional bandwidth is required, typically, an additional 20-50%.

In general, the aggregate throughput rate for a data transmission system can be defined as the ratio of the information bit rate to the minimum required bandwidth. The throughput rate is also equivalent to the number (or average number) of information bits encoded per 2- dimensional symbol. As an example, for encoding system 100, the aggregate throughput rate can be calculated as mk/n bits per second/Hz.

Since radio spectrum is limited, it is advantageous to use it as efficiently as possible. Therefore, it is desirable to signal at as high a throughput rate as possible in accordance with channel conditions (e.g., signal-to- noise ratio, or SNR). The tradeoff between throughput rate and SNR is well known in the art-i.e., the higher the throughput rate, the higher the SNR required by a receiver to successfully demodulate and decode the transmitted signal. This is generally true independent of the particular encoding/modulation method employed.

In the context of the encoding system (100) of FIG. 1 , a high throughput rate can be achieved either through the use of a symbol mapper with a large value of m, or by using a high code rate. A symbol mapper with large m is typically considered a high order modulation scheme. Use of such schemes allows a higher throughput and more efficient use of the channel, at the expense of a higher required SNR at the receiver. In addition, and again with reference to encoding system 100, the throughput rate

may also be increased by increasing the code rate k/n. For example, a 1 /4 rate encoding scheme might be needed in more hostile low signal level environments, while a higher throughput 1 /2 rate encoding scheme might provide acceptable performance under medium and high signal levels.

In many applications of data transmission, it is advantageous to be able to vary the throughput rate dynamically. In wireless systems the channel conditions —e.g., SNR—vary considerably over time for the aforementioned reasons. In such cases, it would be desirable to vary the throughput rate in accordance with the channel conditions to make more efficient use of the spectrum. Also, there might be, in the aggregate of data bits to be transmitted, several sub-classes, or groups, of bits, each with its own required degree of reliability. An example of this is digital speech transmission, where there are typically two or three classes of bits, each with its own threshold error probability (in terms of perceptual significance to the reconstructed speech). In such cases, it may be advantageous to provide different throughput rates for each class of bits, again, in order to allow for the most efficient use of scarce spectrum resources. However, implementing a variable throughput rate scheme using prior art techniques is either cost prohibitive, spectrally inefficient, or results in poor performance, as next described.

Generally, convolutional coding techniques employ independently coupled encoding and mapping schemes. That is, the encoder is designed at a rate that defines the throughput rate for the encoded data, while the symbol mapper is designed to accommodate a particular modulation scheme. Accordingly, varying the code rate in such a system would entail a significant increase in

circuit complexity (i.e. , encoder/symbol mapper combination for each desired code rate), and would therefore be cost prohibitive. Further, such a system would require additional delimiting information— commonly referred to as flush, or tail, bits— to allow encoding and decoding of segments of information encoded with different rate codes. Accordingly, providing a variable rate encoding scheme is not practical using prior art convolutional techniques. A second embodiment for the encoding system (100) is known in the art as trellis coding, and described in Ungerboeck, Trellis-Coded Modulation With Redundant Si ^g nal Sets. IEEE Communications Magazine, February, 1987, Volume 25, Number 2, pages 5-1 1. In general, trellis-coded modulation (TCM) produces output bits for mapping to channel symbols such that the minimum Euclidean distance between neighboring symbols is maximized. Trellis coding techniques differ significantly from general convolutional coding, while offering significant performance advantages over such encoding systems. For example, the resulting bit error probability performance for a trellis coding system is significantly better than that of standard convolutional coding systems, especially for high throughput rates (above 1 or 2 bps/Hz). Prior art trellis coding systems typically employ a fixed rate convolutional encoder, in combination with a fixed sjze (m) symbol mapper. The data encoder and symbol mapper are jointly designed to achieve a particular set of performance goals, in accordance with the anticipated channel environment. Although trellis codes can be designed for acceptable performance in mobile radio channels, the fixed rate convolutional coder and fixed symbol mapper limit their use to applications requiring only a single throughput rate. Accordingly, a trellis coder

designed to be compatible among various code rates suffers from the same deficiencies as a convolutional encoder. That is, circuit complexity requirements would render the system more expensive and less efficient, and additional tail bits would be required for each segment of information encoded at a different rate.

A second solution that allows for multiple code rates is depicted in FIG. 2, and is often referred to as rate compatible punctured convolutional (RCPC) coding. RCPC codes vary the throughput rate by varying the effective rate of the convolutional encoder (201 ). In particular, a puncturing sequence (203) operates to omit some bits in the sequence being transmitted, thereby resulting in a variable code rate. The sequence of encoded bits is periodically punctured with a fixed pattern determined by a code rate controller (205). For every k bits inputted to the puncturing sequence (203), (n-q) bits are punctured, resulting in q bits being applied to a symbol mapper (207). Thus, the resultant code rate of the data encoder (200) is k/q, and the throughput rate is mq/k. Using the same convolutional encoder, multiple throughput rates are available by varying the number of bits punctured (i.e., as more bits are omitted, the code rate and throughput rate increase). Although RCPC codes offer a wide variety of code rates, and do not require additional tail bits each time the code rate is changed, their performance is significantly limited by the fact that a single, fixed symbol mapper— e.g., 207-cannot be optimally matched to a plurality of puncturing strategies. That is, combining RCPC codes with a separately designed symbol mapper cannot provide the performance level achieved by a trellis coder.

Accordingly, there exists a need for a data encoding technique that provides dynamically variable throughput

rates, while maintaining acceptable performance levels in a mobile data communication channel environment. In particular, a cost effective, spectrally efficient data encoder that employs trellis coding techniques while providing variable code rates would be a significant improvement over the prior art.

Brief Description of the Drawings

FIG. 1 shows a block diagram representation of a data encoding technique, which technique is known in the art;

FIG. 2 shows a diagram representation of a second data encoding technique, which technique is also known in the art;

FIG. 3 shows a simplified block diagram of a data encoding system, in accordance with the present invention;

FIG. 4 shows a detailed view of the trellis coder shown in FIG. 3;

FIGS. 5-7 show possible constellation arrangements for the encoded symbols, in accordance with the invention;

FIG. 8 shows a trellis diagram for a particular variable rate trellis code, at the point when a rate switch occurs; and

FIG. 9 shows a simplified block diagram of a data decoding system, in accordance with the present invention.

Detailed Description of the Preferred Embodiment

The present invention encompasses a digital communication system that provides multiple throughput rates for a communication channel using a trellis coding scheme. In particular, a method of data encoding/decoding is described in which discrete data elements, that are to be presently transmitted, are encoded/decoded using at least two different techniques. Accordingly, data element segments from the same data stream can be provided different throughput rates. Further, the throughput rate can be dynamically altered to provide a desired aggregate throughput rate.

FIG. 3 shows a simplified block diagram depicting a data encoding system (300), in accordance with the present invention. A variable rate trellis coder (302) receives a plurality of discrete data elements— e.g., input bits— and trellis encodes the information pursuant to a known set of coding rules, producing a plurality of trellis encoded symbols (303). Further, another variable input is used by the trellis coder {302) to determine the coding rate— i.e., symbols (303) are encoded and outputted to a dimensional formatter (306) at a rate which is determined by a rate control signal (305) as output by the variable rate controller (304). The dimensional formatter (306) acts in response to input from the variable rate controller (304), providing formatted symbols (308) to a modulator (310). The modulator (310), which in a preferred embodiment is a QAM modulator, is used to modulate the information signal onto a carrier signal for transmission over the communication channel.

FIG. 4 shows a more detailed block diagram of the variable rate trellis coder (302) shown in FIG. 3. Information bits are inputted serially to a bit selector-

e.g., in the form of a shift register (401 )— and transferred in parallel to an encoder (405) at time instants determined by the rate controller signal (305). In particular, for every K bits inputted to the shift register (401 )--where K is determined by the rate controller (304) shown in FIG. 3-a set of information bits (403) are transferred in parallel to the bit-to-symbol encoder (405). For each such set of parallel bits, the encoder (405) delivers a trellis encoded symbol (303) to the dimensional formatter (306), shown in FIG. 3, in accordance with a selected coding rule, as later described. Each trellis encoded symbol (303) is M-dimensional- where M is also determined by the rate controller (304) shown in FIG. 3. That is, these symbols (303) can be thought of as vectors consisting of M components.

The dimensional formatter (306) processes the M- dimensional symbols (303) obtained from the variable rate trellis coder (302) by rearranging, or reformatting, them for input to the modulator (310). In a preferred embodiment, the modulator (31 0) is a quadrature amplitude modulator (QAM), which requires that a symbol stream output (308) comprise 2-dimensional symbols. In particular, the dimensional formatter (306) operates to disassemble— i.e., when M>2— the vector symbols (303) and rearrange their respective elements into 2- dimensional symbols (308) for input to the modulator (310). The dimensional formatter (306) may also incorporate an interleaving function, which is well known in the art of error correction coding. Accordingly, the throughput rate for the variable rate trellis coding embodiment of FIG. 3 can be calculated as 2K/M bps/Hz. That is, there are K bits encoded per M-dimensional symbol (303), and there are M/2 2-dimensional symbols (308) for each symbol (303).

To illustrate the possible trellis encoding and dimensional formatting techniques, an example is presented having 2 distinct throughput rates— Rate 1 , where K = 1 , M = 2, yielding a throughput rate of 1 bps/Hz (i.e., a so-called 1/4 rate trellis coder); and Rate 2, where K=1 and M=1 , yielding a throughput rate of 2 bps/Hz (i.e., so-called 1/2 rate trellis coder). The trellis encoding rule employed in each case is an 8-state rule such that there are three relevant memory elements in the shift register (401). The encoding rule for Rate 1 is given by:

Output Symbol = (bι b2b4 , -bι b2b3b4);

whereby a 2-dimensional constellation arrangement, such as that shown in FIG. 5, is produced. [Note that bi through b4 correspond to the most-recent to least-recent bits, respectively, presented to the shift register (401 ), and these bits are denoted +/-1 in this formulation]. Similarly, the encoding rule for Rate 2 is given by:

Output Symbol = b2 - 2b-| b3b4;

whereby a one-dimensional, 4-level constellation, such as that shown in FIG. 6, is produced. These encoding rules can also be described by the following table:

b4b3b2bι Rate 1 Symbol Rate 2 Symbol

0000 c G

0001 B E

0010 A H

0011 D F

0100 B E

0101 C G

0110 D F

0111 A H

1000 B E

1001 C G

1010 D F

1011 A H

1100 C G

1101 B E

1110 A H

1111 D F

Table 1

To illustrate, the 2-dimensional constellation of FIG. 5 depicts Rate 1 symbols B, C, D, and A, respectively, clockwise beginning with the symbol bearing reference numeral 506. Similarly, the 1 -dimensional constellation of FIG. 6 depicts Rate 2 symbols E, F, G, and H, respectively, left-to-right beginning with the symbol bearing the reference numeral 602. [It should be noted that those bits denoted bj in Table 1 take on the values 0 and 1, but in a preferred embodiment correspond to bj values of -1 and 1 , respectively. Further, the dimensional formatter (306) shown in FIG. 3 might simply pass the Rate 1 symbols on to the modulator (310) without modifying them, if desired, since they are already in two- dimensional format. However, Rate 2 symbols should be paired together by the dimensional formatter (306) before being applied to the modulator (310). Such pairing results

in so-called 4-ary formatted symbols of the form shown in FIG. 7, i.e., 16QAM symbols.

FIG. 8 depicts a trellis diagram (800), in accordance with one embodiment of the invention. In general, trellis diagrams illustrate possible shift register states for the encoder, the transitions between states resulting from possible input information bits, and the encoded output symbols resulting therefrom. Referring to FIG. 8, there are eight encoder states (801 ), corresponding to the eight possible combinations of the shift register triplet b4b3b2- Two transition paths emanate from each state, corresponding to the two possible values of input bit bi . Introduction of new input bit bi produces a transition to a new state (802), with an associated encoded output symbol. This new state (802) reflects the updated states of the shift register, with b2 now containing the value of the last input bit. The length of the trellis, as well as the actual path taken, depends on the particular sequence of information bits to be presently transmitted. The trellis diagram (800) further shows output symbol intervals (804, 806) being separated by a rate switch point (808)-the point at which the trellis coding rate switches from Rate 1 to Rate 2 coding. That is, during a first symbol interval (804), prior to the switch point (808), the Rate 1 encoding rule is employed to generate the 2-dimensional, encoded symbols denoted by reference number 810. During a second symbol interval (806), subsequent to the rate switch point (808), the Rate 2 encoding rule is employed, thereby generating the 1 - dimensional encoded symbols denoted by reference number 812. Note that the rate adjustment is effectively seamless, since no additional delimiting flush bits are required in switching between two encoding rates (e.g., Rate 1 and Rate 2). Thus, a spectrally efficient,

dynamically variable throughput rate trellis encoder has been realized.

The instant invention can be employed in a wide variety of situations requiring dynamically variable throughput rates. For example, in digital speech applications, speech encoder output bits might be grouped into several classes according to their perceptual significance. The various groups, or segments, of bits might then be passed through data encoder 300, with a rate switch occurring at each segment boundary. In an alternate embodiment, the throughput rate may be varied in a predetermined fashion to realize a desired aggregate throughput rate. For example, in the context of the trellis encoder described above, cyclically alternating between Rates 1 and 2 (i.e., a rate adjustment occurring after each symbol), an aggregate, or average, throughput rate of 1.5 bps/Hz could be realized. Through provision of such a coding arrangement, discrete data elements, representing information to be presently transmitted, can be flexibly encoded by two or more mapping techniques in a dynamic fashion, thereby achieving a variety of resultant aggregate throughput rates.

FIG. 9 shows a simplified block diagram (900) of a decoding arrangement suitable for decoding information encoded using the encoder (300) shown in FIG. 3. In a preferred embodiment, a demodulator (910) is used to demodulate the information signal from a carrier signal received over the communication channel. The demodulator (910) outputs formatted symbol samples (908), which symbols correspond to the symbols (308) shown in FIG. 3. Alternatively, the demodulator (910) might output channel state information samples— not shown— associated with these symbol samples (908), which may be employed in the decoding process, as is well

understood in the art. In a preferred embodiment, the demodulator (910) is a QAM demodulator, so that the symbol samples (908) are two-dimensional. The symbol samples (908) are then input to a dimensional deformatter (906), which performs operations inverse to those performed in the dimensional formatter (306) shown in FIG. 3. That is, the deformatter (906) deconstructs the two-dimensional symbol samples (908) and reassembles the constituent elements into M- dimensional symbol samples (903). The dimensional deformatter (906) might also incorporate a de- interleaving function that reverses any interleaving performed in the encoder. Additionally, channel state information symbols accompanying the symbol samples (908) are deformatted and de-interleaved by the deformatter (906), as appropriate. A variable rate trellis decoder (902) receives the M-dimensional symbol samples (903), and any associated channel state information, and produces an estimate of the original information bits or discrete data elements. The trellis decoder (902) may be implemented by a variety of different methods. In a preferred embodiment, the trellis decoder (902) utilizes the Viterbi algorithm— a well-known maximum likelihood sequence estimation technique. Finally, a rate controller (904) controls the operation of the dimensional deformatter (906) and the trellis decoder (902) in a manner similar to that of the rate controller (304) shown in FIG. 3.

What is claimed is: