METHOD AND APPARATUS FOR GENERATING A PREAMBLE FOR USE IN CABLE TRANSMISSION SYSTEMS

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application Serial No. 61/196,746 filed October 20, 2008, which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

The present principles relate to cable transmission systems and techniques. More particularly, it relates to a preamble design for the DVB-C2 standard used for cable channel transmissions.

BACKGROUND

Recently, DVB-C2 (next generation digital cable transmission system being developed by the DVB Project) Standard is under progress. An agreement is made that DVB-C2 shall reuse the content of DVB-T2 Standard as much as possible. As a result, OFDM technique will be adopted as well as the coding technique (BCH+LDPC) specified in DVB-T2 Standard. However, it must be noted that DVB-T2 Standard is designed for using in the terrestrial wireless channel while the DVB-C2 Standard is designed for using in the cable channel. Cable channels differ from wireless channels in two aspects. First, cable channel is a high quality (high SNR) channel with only a few weak echoes. Second, the wireless spectrum assigned for TV broadcasting is confined by FCC while we can use the spectrum with high freedom in the cable networks.

Consequently, the signal frame structure and preambles used in DVB-T2 may not be suitable to be reused in DVB-C2 Standard.

SUMMARY

According to an implementation, the method for generating a preamble for use in a cable transmission medium, includes inserting a complementary sequence as a header in beginning carriers, protecting signaling bits of the system with error correction codes, mapping the complementary sequence and signaling bits into modulation symbols on allocated even carriers only, where the mapped modulation symbols form the preamble in each frame, and transforming the formed preamble to a time domain.

According to another implementation the apparatus for generating a preamble for use in a cable transmission system includes a processor for inserting a complementary sequence as a header in beginning carriers, protecting signaling bits of the system with error correction codes and mapping the complementary sequence and protected signaling bits into modulation symbols to form the preamble, and a modulator configured to allocate even carriers only and enable the transmission of the preamble on the allocated even carriers.

These and other aspects, features and advantages of the present principles will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The present principles may be better understood in accordance with the following exemplary figures, in which:

Figure 1 is representation of the frame structure of DVB-C2 signals; Figures 2a-2c show block diagrams illustrating the method for generating a preamble according to various implementations of the present principles; Figure 3 is a representation of the composition of a DVB-C2 preamble in a frequency domain;

Figure 4 is an example of a cyclic representation of the preamble with bonded channels according to an implementation of the present principles;

Figure 5 is a representation of a structure of the preamble signals according to an implementation of the present principles; Figure 6 is an example of a preamble using Walsh codes according to an implementation of the present principles; and

Figure 7 is a block diagram of an apparatus for implementing the preamble generation according to an embodiment of the present principles.

DETAILED DESCRIPTION

The present principles are directed to methods and an apparatus for Preamble design in DVB-C2 standard used in digital cable transmission environments.

The present description illustrates the present principles. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the present principles and are included within its spirit and scope.

All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the present principles and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions.

Moreover, all statements herein reciting principles, aspects, and embodiments of the present principles, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

Thus, for example, it will be appreciated by those skilled in the art that the block diagrams presented herein represent conceptual views of illustrative circuitry embodying the present principles. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes which may be substantially represented in computer readable media and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term "processor" or "controller" should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor ("DSP") hardware, read-only memory ("ROM") for storing software, random access memory ("RAM"), and non-volatile storage.

Other hardware, conventional and/or custom, may also be included. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementer as more specifically understood from the context.

In the claims hereof, any element expressed as a means for performing a specified function is intended to encompass any way of performing that function including, for example, a) a combination of circuit elements that performs that function or b) software in any form, including, therefore, firmware, microcode or the like, combined with appropriate circuitry for executing that software to perform the function. The present principles as defined by such claims reside in the fact that the

functionalities provided by the various recited means are combined and brought together in the manner which the claims call for. It is thus regarded that any means that can provide those functionalities are equivalent to those shown herein.

Reference in the specification to "one embodiment" or "an embodiment" of the present principles, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment of the present principles. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment", as well any other variations, appearing in various places throughout the specification are not necessarily all referring to the same embodiment.

In accordance with one implementation, a preamble is designed for use in DVB- C2 Standard. The preamble of the present principles has multiple functions including frame timing synchronization, frequency offset estimation, system information signaling, and initial channel estimation.

Those of skill in the art will recognize that some concepts addressed in this disclosure include, but are not limited to, DVB-C2, Preamble design, Signaling, and Synchronization.

The preamble design of the present principles is motivated by the need for an efficient preamble structure for use in cable channels. In accordance with one preferred implementation, the preamble structure of the present principles possesses the following functions:

1. Allow reception at any tuning position to support Partial Reception in the receiver side when the Channel Bonding technique is applied in the transmitter side;

2. C2 system identification, preamble identification and frame timing synchronization; 3. Frequency offset estimation;

4. Signaling of system information (guard interval length, constellation, coding rate etc.); and

5. Initial channel estimation.

Basic Preamble Structure

As shown in Fig. 1 , a DVB-C2 frame 10 consists of a bunch of OFDM symbols 12a - 12n and the first OFDM symbol is a preamble symbol 14 which is used to perform synchronization and signaling of C2 system. In the example described, the FFT size of the OFDM modulation is selected as 4k. Thus, in accordance with this exemplary implementation, the preamble is designed using OFDM modulation with 4k carriers.

Fig. 2a shows the block diagram of an exemplary method 20 of generating the preamble. In this example, a complementary sequence 22 is inserted in the beginning carriers as a header (see for example, Fig. 3) and then mapped 24 into modulation symbols (e.g., BPSK mapping). Those of skill in the art will recognize that the complementary sequence is part of the standard and can be referred to at Table 63 in the Draft ESTY EN 302 755 V1.1.1_0.2(2008-10). Functionally, the mapped symbols are assigned to the allocated even carriers, thus the mapping occurs before the allocation of the even carriers.

The signaling bits of system information 26 are protected by an error correction code 28 and then mapped into modulations symbols of either orthogonal codes or QAM symbols (30). Fig. 5 shows an example of a structure of the preamble symbols.. In accordance with one implementation, those of skill in the art will recognize that pilot carriers can be used to perform channel estimation. Fig. 6 shows another example of using Walsh code of length 2 to convey 1 bit. The information bit 0 is transmitted by the code (1 ,1) and the information bit 1 is transmitted by the code (1 ,-1). Once the signal of bits of the system are transmitted, the modulator allocates the system bit information and complementary sequence to the even carriers 32. It is important to note that the according to the preferred implementation of the present principles, only even carriers are used and the odd carriers are left as virtual carriers. Finally, the preamble signal is transformed to the time domain by IFFT operation 34 and depending on the desired

implementation, a cyclic prefix (CP) may be added 36 to complete the generation of the DVB-C2 preamble.

Figure 2b shows the method steps 20b as derived from the block diagram of Figure 2a. In this implementation, the complementary sequence is inserted as a header in beginning carriers 22, the signaling bits are protected with error correction codes 28, and both the complementary sequence and signaling bits are mapped into modulation symbols (24, 30), and then they are allocated (32) to the even carriers only.

Figure 2c shows another implementation of the method 20c according to the present principles. In this implementation, consideration is made for when two or more channels in the cable transmission are bonded (40). In this instance, and as described below) it is necessary to add the step of restricting (42) the number of carriers to be less than or equal to the number of carriers used in an OFDM symbol. The added step of ensuring (44) the generated preamble repeated in frequency fills the complete spectrum of the bonded channels is also required. Figure 7 shows an apparatus 70 for generating the DVB-C2 preamble according to the present principles. A processor 72 in communication with a memory 74 and modulator 76 controls the preamble generation by utilizing the below criterion and performing the steps for the same. Those of skill in the art will recognize that memory 74 can contain the variations in complementary sequences needed and the processor 72 will make determinations as to which complementary sequences are used during preamble generation so as to coordinate the same with the desired cable transmission application.

According to one preferred implementation, there are three criteria for the preamble structure:

1. The number of carriers used by the preamble, K _p is confined by

Kp ≤ /ύotal ( 1 ) where is the number of carriers used in an OFDM symbol, e.g. /Ctotai = 3409 for 4K mode (FFT size = 4096) specified in DVB-T2;

2. The preamble, which carries the information of signals transmitted in the spectrum of the bonding channels, cyclically fill the complete spectrum. Furthermore, the preamble will cover the whole 8 MHz, i.e., 3584 carriers defined in DVB-T2. This criterion can be expressed as X _i [k] = P[(i- 35S4 + k)%K _P ], i = 0,\,..., k = θχ...,25S3 (2) where Xι[k] is the transmitted signal in the k ^lh carrier of the / ^th bonding channel and P[I] is the preamble signal in the / ^th carrier, O ≤ l ≤ K _P ; and

3. Only the even carriers are modulated while the odd carriers are left as virtual carriers. The first and second criteria come up with the need to support Partial Reception in the receiver side when the Channel Bonding technique is applied in the transmitter side. By using the Channel Bonding technique, several channels are bonded together to provide a large spectrum. Thus, this large spectrum can be divided into subchannels or data slices according to the required bandwidth of individual service. To be more flexible, a subchannel or a data slice is allowed to start at any point (carrier) within the bonding spectrum. Then, the preamble has to be received and detected by a receiver at any tuning position within the bonding spectrum. It is worth noting that the guard band cannot be removed or reduced if Partial Reception is implemented in the receiver. Thus, the spectral efficiency does not have an apparent improvement when the Channel Bonding technique is used. When Channel Bonding and Partial Reception are not used, or there is a restriction for a subchannel such that a subchannel is not allowed to cross the boundary of two neighboring bonding channels, the first two criteria can be released. The third criterion is made so that the preamble has a repetition structure in time domain to enable fast preamble identification. This kind of structure is also used in IEEE 802.11 and 802.16. The repetition structure can be easily understood. Consider that we modulate even carriers only and leave all odd carriers as virtual carriers. From inverse DFT equation,

x[n] = — Ϋ x[k]e ^J2! *" ^IN (3)

Since X[k] = 0 for odd carriers, we can rewrite (3) as

1 W / 2-1

4n] = ^ ∑X[2k]e' ² ^" ^/N (4)

It is clear from (4) that χ[«] = x[N/2+n], n = 0,\,...,N/2-\ . This structure can be used to perform frame timing synchronization and fractional frequency offset estimation. Although the guard interval can also achieve these two goals, the performance is degraded when the length of guard interval is not greatly larger than the channel length.

Preamble Structure for Frequency Offset Estimation

If we normalize frequency offset by carrier spacing, the frequency offset can be separated as an integer part and a fractional part. The fractional part of frequency offset can be estimated by the time domain repetition structure. The estimation of integer part frequency offset has to rely on frequency domain pilots due to phase ambiguity problem for time domain signals. In at least one implementation in this disclosure, a complementary sequence is allocated in the frequency domain as shown in Fig. 3 to assist integer frequency offset estimation. The length of the complementary sequence shall be selected according to the channel condition. There are 8 orthogonal complementary sequences of length 64 and 16 orthogonal complementary sequences of length 256, specified in DVB-T2 for the P1 preamble. Each of the complementary sequences of length 64 is made by a concatenation of a set of 8 complementary sequences of length 8. The 8 complementary sequences of length 64 are made by 8 orthogonal sets of complementary sequences. The complementary sequences of length 256 are made by the same way. They are made by 16 orthogonal sets of complementary sequences of length 16. For DVB-C2, one of the sequences with a length of 64 (124721741 D482E7B in hexadecimal notation), is selected and allocated in the beginning of the preamble as shown in Fig. 5 and Fig. 6. The complementary sequence is allocated in the even carriers of the first 128 carriers. Note that we use a complementary sequence instead of 8 orthogonal complementary sequences which can convey 3 bit information implemented in DVB-T2. The processing time to estimate the integer part of frequency offset is decreased by doing so.

Preamble Structure for Signaling of System Information

Two signaling methods are provided in the preamble.

1. Re-use P2 preamble and scattered pilot pattern PP5 specified in DVB-T2 Standard. In this method, scattered pilot pattern PP5 is applied to the DVB-C2 system. However, there is a pilot for every 12 carriers in the preamble as shown in Fig. 5. The signaling bits are protected by BCH and LDPC codes and then mapped to QAM symbols in available even carriers. Signaling by this method can allow more information bits transmitted but the decoding complexity is larger than the signaling method described below.

2. Use orthogonal codes to convey signaling bits of system information.

According to the channel model recommended by DVB-C2 system evaluation (SE) group, the rms delay spread σ _τ is equal to 97.5 ns. The coherence bandwidth which is defined as the bandwidth over which the frequency correlation function is above 0.9 is approximately

B _c » — i- = 205 kHz . (5) c 50σ _r

Consider the 4k mode defined in DVB-T2, the subcarrier spacing is approximately 2.232 kHz. Thus, we can assume that the neighboring 205/2.232=91 carriers possess equal gain and linear phase. Thus, it is reasonable to assume that for a small number of neighboring subcarriers, e.g., 16, they have the same frequency domain channel gain coefficients. Taking advantage of this property, we can transmit orthogonal codes in neighboring subcarriers and decode them in the receiver by simply performing correlation. For instance, the information bit 0 is transmitted by the code (1 ,1) and the information bit 1 is transmitted by the code (1 ,-1). In addition, the bits conveying system information should ideally be error free. Therefore, an error correction code added as shown in Fig. 2. The selection of the orthogonal codes and error correction codes depends on the number of required system information bits and the implementation

complexity. The Walsh Code of length 8 is selected here for DVB-C2 preamble. The mapping of bits to Walsh code is given in Table 1 below:

TABLE 1

Consider 4k mode defined in DVB-T2 and select Ktotai equaling to 3408 (3409 in DVB- T2), from equation (1 ), the number of carriers in a preamble is K _P ≤ 3408. In order to carry as much information as possible and fit the coding structure, Kp is selected to be 3200. Thus, except the first 128 carriers which are allocated using a complementary sequence and, from carrier index 128 to 3200, 192 sets of Walsh codes with length 8 are transmitted in even carriers. It is also possible to leave a small gap between the complementary sequence and Walsh code sets to have better performance of frequency offset estimation. A Walsh code of length 8 is able to convey 3 bits of information. Therefore, 576 information coding bits are transmitted. The Reed-Muller Code, RM(64,42,8) is selected to protect signaling bits of system information. Thus, the preamble can carry 378 signaling bits of system information. The total 576 bits are divided into 9 sets of 64 bits to carry 9 sets of 42 signaling bits of system information. The selection of the Reed-Muller code is due to its simplicity of decoding. If Walsh Code with length 4 and a more robust error correction code e.g., Reed-Solomon code are used, it is possible to carry more than 600 signaling bits. It is worth noting that by using

this scheme to transmit signaling bits, no channel estimation is required in decoding signaling bits. Thus, the time delay is greatly reduced.

I. Preamble Structure for Initial Channel Estimation

If we use the first signaling method, the channel gain coefficients on those pilot carriers in the preamble can be reuse in the following OFDM symbols. If the second signaling method is used, after we decode the system information bits, we can encode the decoding bits to get the original bits and thus transmitted orthogonal codes. Then, the channel gain coefficients in those modulated subcarriers can be easily obtained. It is worth noting that we get a much larger number of channel gain coefficients than what we get using the first signaling method. Since the cable channel is a stable channel, the channel gain coefficients obtained from the preamble are very helpful for channel estimation. The C2 system will be benefited by this initial channel estimation.

Those of skill in the art will recognize that the present principles provide several advantages over known cable transmission techniques. Some examples of those advantages are:

1. The preamble designed in at least one implementation of this disclosure provides an λ//2-point repetition structure in time domain where N is the size of FFT. This time domain structure can be used to perform preamble identification, frame timing synchronization and fractional frequency offset estimation in the same time. In addition, the required complexity is low and the performances of frame timing synchronization and fractional frequency offset estimation are better than CP-based method;

2. One of the signaling methods provided in to decode signaling bits transmitted in the preamble. Thus, the complexity is reduced and the delay time in processing the preamble is also reduced at least one implementation in this disclosure does not require channel estimation;

3. The designed preamble using orthogonal codes to transmitted signaling bits can provide additional initial channel gain coefficients (frequency domain channel gain coefficients in even carriers); and

4. The complexity of decoding the designed preamble structure in at least one implementation in this disclosure is smaller and hence the processing time (initial delay) for decoding the preamble is much shorter.

These and other features and advantages of the present principles may be readily ascertained by one of ordinary skill in the pertinent art based on the teachings herein. It is to be understood that the teachings of the present principles may be implemented in various forms of hardware, software, firmware, special purpose processors, or combinations thereof.

Most preferably, the teachings of the present principles are implemented as a combination of hardware and software. Moreover, the software may be implemented as an application program tangibly embodied on a program storage unit. The application program may be uploaded to, and executed by, a machine comprising any suitable architecture. Preferably, the machine is implemented on a computer platform having hardware such as one or more central processing units ("CPU"), a random access memory ("RAM"), and input/output ("I/O") interfaces. The computer platform may also include an operating system and microinstruction code. The various processes and functions described herein may be either part of the microinstruction code or part of the application program, or any combination thereof, which may be executed by a CPU. In addition, various other peripheral units may be connected to the computer platform such as an additional data storage unit and a printing unit.

It is to be further understood that, because some of the constituent system components and methods depicted in the accompanying drawings are preferably implemented in software, the actual connections between the system components or the process function blocks may differ depending upon the manner in which the present principles are programmed. Given the teachings herein, one of ordinary skill in the pertinent art will be able to contemplate these and similar implementations or configurations of the present principles.

Although the illustrative embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the present principles is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present principles. All such changes and modifications are intended to be included within the scope of the present principles as set forth in the appended claims.