BACKGROUND OF THE INVENTION This invention relates generally to video raster graphics systems and, more particularly, to raster graphics systems capable of handling video signals of various video sync formats.

Video signals for raster graphics systems such as televisions and computer displays come in various sync formats. A sync format typically includes signals for synchronizing the horizontal and vertical movement of the electron beam within a cathode ray tube (CRT) monitor. Common sync formats include military, industrial and broadcast formats, each differing in some respects. The military and industrial formats, for example, do not generate a horizontal sync signal during the vertical sync period. This lack of a continuous horizontal sync signal makes the use of such formats difficult with low cost, commercially available raster graphics systems. More expensive raster graphics systems capable of handling such formats are normally required.

Therefore, an object of the invention is to provide a means for allowing low cost raster graphics systems that require a continuous horizontal sync signal to accept video signals lacking such a sync signal, such as those having military and industrial formats. Another object of the invention is to provide such a means that allows low cost raster graphics systems to accept video signals of various formats without adjustment. Still another object of the invention is to provide such a means that allows low cost raster graphics systems to handle sporadic loss of the sync signal in any format without loss of the display.

SUMMARY OF THE INVENTION In accordance with the invention, a method of generating raster video signals from video signals having a variety of video sync formats includes the following steps. A composite video signal having a video sync format is detected. Horizontal and vertical sync signals are extracted from the composite video signal. Upon detection of a horizontal sync signal, a count is initiated and a horizontal video drive signal is generated when the count reaches a first predetermined number of counts. If a

horizontal sync signal is not detected within a predetermined time, a count is initiated nonetheless after the horizontal video drive signal is generated. Another horizontal video drive signal is then generated when the count again reaches the first predetermined number. The initiation of a count in the absence of a horizontal sync signal may comprise resetting the count via a Reset signal if the count reaches a second predetermined number greater than the first predetermined number. A counter generating the count may be running continuously, with the count reset to a starting value whenever a horizontal sync signal or a Reset signal is received. Apparatus according to the invention comprises a detector for detecting a composite video signal that includes a horizontal sync signal. A counter initiates a count upon detecting a horizontal sync signal and generates a horizontal video drive signal when the count reaches a predetermined number. If a horizontal sync signal is not detected within a predetermined time, means for initiating a count begins another count after the horizontal video drive signal is generated. Another horizontal video drive signal is then generated when the count again reaches the first predetermined number.

The means for initiating a count may comprise a reset path for initiating the count upon detecting a second predetermined number greater than the first predetermined number.

The foregoing and other objects, features, and advantages of the invention will become more apparent from the following detailed description of a preferred embodiment which proceeds with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a timing diagram showing the formats of military, industrial, and broadcast sync signals.

FIG. 2 is a block diagram of an apparatus for providing video drive signals according to the invention. FIGS. 3A-C are timing diagrams showing how a horizontal video drive signal is generated according to the invention.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

FIG. 1 shows three common types of video sync formats—military, industrial and broadcast. Each format has a horizontal sync period followed by a vertical sync period. However, only the broadcast sync format superimposes horizontal sync information over the vertical sync information during the vertical sync period. In the industrial and military sync formats, no horizontal sync information is provided during the vertical sync period. If either of these two formats are used with a conventional raster graphics system, this temporary lack of horizontal sync information can disrupt synchronization of the horizontal and vertical drive signals that drive a cathode ray tube (CRT) or equivalent device.

The present invention provides a solution by generating a horizontal video signal in the absence of horizontal sync information. FIG. 2 shows a preferred embodiment of an apparatus 10 according to the invention for solving this problem.

Apparatus 10 receives a composite video signal, which may be in any sync format (i.e., military, industrial, broadcast), and derives therefrom horizontal and vertical drive signals for a raster graphics system. The apparatus includes a sync detector 12 for detecting a horizontal sync signal (H Sync) and a vertical sync signal (V Sync) within a composite video signal. Sync detector 12 is of conventional design and may include a level detector for detecting sync pulses (which have voltages below ground) and an integrator for distinguishing the shorter horizontal sync pulses from the longer vertical sync pulses. The sync detector 12 is preferably constructed to generate TTL (transistor- transistor logic) level signals, although other signal levels could also be used.

From detector 12, the horizontal sync signal is routed to horizontal counter logic 14. Logic 14 comprises a counter and related circuitry for performing to-be-described functions. A preferred form of logic 14 is a programmable logic device (PLD) or equivalent device. Other input signals to the logic 14 include periodic input pulses from an oscillator such as a crystal oscillator 16 and a Reset signal from the output of logic 14. In the preferred embodiment, the counter within logic 14 runs continuously in response to the periodic pulses received from oscillator 16 and is reset upon reception a horizontal sync signal (pulse) or a Reset signal to a starting value such as zero, one, etc. Logic 14 generates a horizontal video drive signal (H Drive) when the counter reaches a predetermined number of counts. To maintain a synchronous relationship

between H Sync and H Drive, oscillator 16 operates at a frequency determined by the video display size and horizontal line rate. The pulse period should be short enough so that the maximum offset between the H Sync and H Drive signals does not produce objectionable jitter on the video display screen. The horizontal video drive signal is then routed to a horizontal ramp generator 18 for generating a horizontal raster deflection signal that controls the horizontal movement of the CRT electron beam. In the event that a horizontal sync signal is not present in the video signal of interest, apparatus 10 must generate the horizontal video drive signal by other means. It does this through use of the Reset signal 17 in logic 14. The counter within the logic 14 is configured for automatically resetting the count if the count reaches a second predetermined number greater than the first predetermined number. The counter resets and initiates another count for generating another horizontal video drive signal. When the H Sync signal reappears, the counter resets and H Drive is again synchronized to H Sync. FIGS. 3A-C are timing diagrams that illustrate the operation of logic 14. Assume that the sync format is military, and that the H Sync signal is not present during the vertical sync period (see FIG. 1). FIG. 3 A shows several signals during the horizontal sync period that precedes the vertical sync period. The H Sync signal from detector 12 is shown, with the signal period measured from its falling edge. The H Sync signal resets the counter within logic 14 each time its falling edge is sensed by the counter. The counter then counts the pulses received from the oscillator 16 starting from the starting value. Shown below the H Sync signal is a line representing the absence of the Reset signal. The Reset signal, if present, resets the counter of logic 14 if the H Sync signal is not received within a predetermined time (before the count reaches a predetermined number). Because the H Sync signal is present throughout the horizontal sync period, the counter does not reach the second predetermined number and the Reset signal is not generated. Below the Reset signal is the H Drive signal, which is generated each time the count, initiated by the H Sync signal, reaches the first predetermined count, labeled as x in the figure. H Drive can be set to occur at any predetermined count. In FIG. 3 A, it is set to occur just before reception of another H Sync signal.

FIG. 3B illustrates what occurs during a vertical sync period where horizontal sync information is absent. During this period, a Reset signal (shown as a square wave pulse)

is generated because the counter is not reset before it reaches a second predetermined count, shown as y in the figure. The Reset signal, in effect, substitutes for the H Sync signal during the vertical sync period and resets the counter. Below the H Sync signal is the H Drive signal, generated as before when the counter reaches the predetermined count x.

FIG. 3C illustrates the case where the video signal is in broadcast format and the H Sync signal is a double-frequency pulse during the vertical sync period. Logic 14 includes a digital filter that filters out the H Sync pulses that occur within a central count range. Only H Sync pulses outside the range cause a reset of the count, and the H Drive signal is generated at the appropriate time.

Referring again to FIG. 2, the vertical sync signal may be fed directly to a vertical ramp generator 20. Vertical ramp generator 20 generates a vertical raster deflection signal that controls the vertical movement of the CRT electron beam.

It will be apparent to those of skill in the art that many variations of the preferred embodiment are possible. For example, the functional blocks in FIG. 2 may be implemented in one or more discrete or integrated devices, depending upon the amount of hardware integration desired. The logic 14 may also be implemented in one or more dedicated or programmable logic devices (PLDs).

The invention, both the apparatus 10 and associated method, offers a number of advantages over prior approaches. It can handle broadcast, military, and industrial format composite video signals. If can work in any line rate by changing the predetermined numbers in the counters of logic 14, such as at 525/60, 625/50 and 875/60 line rates. It can handle the sporadic loss of sync signals because it generates a substitute for the horizontal sync signal if required. Other advantages include the following. Since the location on the line is known in the logic, additional outputs can be generated for the display system (e.g., signals to blank the video at certain times). By the addition of a few control inputs, different predetermined numbers can be decoded for different line rates, allowing the simultaneous use of multiple lines rates without requiring additional circuitry. This invention has been described herein in considerable detail in order to comply with the Patent Statutes and to provide those skilled in the art with the information needed to apply the novel principles and to construct and use such specialized

components as are required. Having illustrated and described the principles of the invention in a preferred embodiment, it should be apparent to those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. For example, features of the invention shown in hardware may also be implemented in software.

Therefore, the illustrated embodiment should be considered only as a preferred example of the invention and not as a limitation on the scope of the claims. I therefore claim as my invention all modifications and equivalents to the illustrated embodiments coming within the scope and spirit of following claims.