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Title:
METHOD AND APPARATUS FOR HIGH EFFICIENCY SCALABLE NEAR-FIELD WIRELESS POWER TRANSFER
Document Type and Number:
WIPO Patent Application WO/2009/070730
Kind Code:
A3
Abstract:
Wireless power transfer systems are provided. A wireless power transmitter can include a transistor block providing a switching mode amplifier, and a low-Q output network including a tunable supply voltage. The transistor block can be scalable. Multiple scalable transistor blocks can be incorporated in a power transfer system using a single tunable supply voltage and transmitting coil. The tunable supply voltage can be controlled by an adaptive power supply tuning circuit to accommodate for a range of loading conditions. Embodiments of the subject invention are capable of achieving high efficiency across a wide range of output power levels.

Inventors:
LOW ZHEN NING (US)
LIN JENSHAN (US)
Application Number:
US2008/084970
Publication Date:
August 27, 2009
Filing Date:
November 26, 2008
Export Citation:
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Assignee:
UNIV FLORIDA (US)
LOW ZHEN NING (US)
LIN JENSHAN (US)
International Classes:
H02J17/00; H02J15/00
Foreign References:
JP2002320347A2002-10-31
US20030214821A12003-11-20
JP2006230032A2006-08-31
Attorney, Agent or Firm:
PARKER, James, S. et al. (Lloyd Saliwanchik,P.o. Box 14295, Gainesville FL, US)
Download PDF:
Claims:

CLAIMS What is claimed is:

1. A wireless power transfer system, comprising: a transistor, wherein the transistor has an on state and an off state; an output network, wherein the output network is low Q; and a transmitting coil block, wherein the transmitting coil block is coupled to the output network, wherein the transmitting coil block comprises a transmitting coil, wherein when the transistor is in the on state the transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the transistor is in the on state the transistor has a low voltage and high current across the transistor, wherein when the transistor is in the off state the transistor has a low current and high voltage across the transistor.

2. The system according to claim 1, wherein Q is less than 20.

3. The system according to claim 1, wherein Q is less than 10.

4. The system according to claim 1, wherein Q is less than 8.

5. The system according to claim 1, wherein Q is in the range of 10-20.

6. The system according to claim 1, wherein Q is in the range of 1.8-5.

7. The system according to claim 1, wherein Q is in the range of 2-4.

8. The system according to claim 1, further comprising: a receiver coil, wherein the receiving coil is inductively coupled to the transmitting coil, wherein the receiver coil is capable of delivering power to a load.

9. The system according to claim 1, further comprising: a first choke inductor coupled between the drain of the transistor and a power supply, wherein the output network comprises: a first load network capacitor coupled between a drain of the transistor and ground; a first load network inductor, wherein the first load inductor is in series between the drain of the transistor and the transmitting coil block.

10. The system according to claim 9, wherein the power supply is a DC power supply.

11. The system according to claim 9, wherein the transmitting coil block comprises a series capacitor in series with the transmitting coil.

12. The system according to claim 11, wherein the transmitting block comprises a shunt capacitor in parallel with the transmitting coil.

13. The system according to claim 9, wherein the output network comprises a series capacitor in series with the first load network inductor.

14. The system according to claim 10, wherein the DC power supply is a variable DC supply.

15. The system according to claim 14, further comprising a tuning circuit capable of receiving charging data from a device under charge for adaptive power supply tuning of the variable DC supply.

16. The system according to claim 9, wherein the output network further comprises: a second transistor, wherein the second transistor has a second on state and a second off state; a second load network capacitor coupled between a drain of the second transistor and ground; and

a second load network inductor, wherein the second load network inductor is in series between the drain of the second transistor and the transmitting coil block wherein when the second transistor is in the second on state the second transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the second transistor is in the second on state the second transistor has a low voltage and high current across the second transistor, wherein when the second transistor is in the second off state the second transistor has a low current and high voltage across the second transistor.

17. The system according to claim 16, further comprising: a second choke inductor coupled between the drain of the second transistor and the DC supply.

18. The system according to claim 9, wherein the output network further comprises: at least one additional transistor, wherein the at least one additional transistor has an at least one additional on state and an at least one additional off state; at least one additional load network capacitor coupled between a drain of a corresponding at least one additional transistor and ground; and at least one additional load network inductor, wherein the at least one additional load network is in a series between the drain of the at least one additional transistor and the transmitting coil block, wherein when the at least one additional transistor is in the at least one additional on state the at least one additional transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the at least one additional transistor is in the at least one additional on state the at least one additional transistor has a low voltage and high current across the at least one additional transistor, wherein when the at least one additional transistor is in the at least one additional off state, the at least one additional transistor has a low current and high voltage across the at least one additional transistor.

19. The system according to claim 18, further comprising: at least one additional choke inductor coupled between the drain of the corresponding at least one additional transistor and the DC supply.

20. The system according to claim 1, wherein the transmitting coil block further comprises: a coil shunt capacitor coupled in parallel with the transmitting coil.

21. The system according to claim 1, further comprising a tuning circuit capable of receiving charging data from a device under charge for adaptive power supply tuning.

22. The system according to claim 1, further comprising a tuning circuit capable of receiving voltage and current data from across the transmitting coil and voltage data from across the transistor as input for adaptive power supply tuning.

23. The system according to claim 9, further comprising a tuning circuit capable of receiving output current of the power supply and voltage across the transmitting coil for adaptive supply tuning.

24. The system according to claim 1, further comprising: a driving source coupled to a gate of the transistor.

25. The system according to claim 24, wherein the driving source is an ac power source.

26. A method for wireless power transfer, comprising: providing a transistor, wherein the transistor has an on state and an off state; providing an output network, wherein the output network is low Q; providing a transmitting coil block, wherein the transmitting coil block is coupled to the output network, wherein the transmitting coil block comprises a transmitting coil; and driving a gate of the transistor with a driving source,

wherein when the transistor is in the on state the transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the transistor is in the on state the transistor has a low voltage and high current across the transistor, wherein when the transistor is in the off state the transistor has a low current and high voltage across the transistor.

27. The method according to claim 26, wherein Q is less than 20.

28. The method according to claim 26, wherein Q is less than 10.

29. The method according to claim 26, wherein Q is less than 8.

30. The method according to claim 26, wherein Q is in the range of 10-20.

31. The method according to claim 26, wherein Q is in the range of 1.8-5.

32. The method according to claim 26, wherein Q is in the range of 2-4.

33. The method according to claim 26, further comprising: providing a receiver coil, wherein the receiving coil is inductively coupled to the transmitting coil, wherein the receiver coil is capable of delivering power to a load.

34. The method according to claim 26, further comprising: providing a first choke inductor coupled between the drain of the transistor and a power supply, wherein the output network comprises: a first load network capacitor coupled between a drain of the transistor and ground; a first load network inductor, wherein the first load inductor is in series between the drain of the transistor and the transmitting coil block.

35. The method according to claim 34, wherein the power supply is a DC power supply.

36. The method according to claim 34, wherein the transmitting coil block comprises a series capacitor in series with the transmitting coil.

37. The method according to claim 36, wherein the transmitting block comprises a shunt capacitor in parallel with the transmitting coil.

38. The method according to claim 34, wherein the output network comprises a series capacitor in series with the first load network inductor.

39. The method according to claim 35, wherein the DC power supply is a variable DC supply.

40. The method according to claim 39, further comprising providing a tuning circuit capable of receiving charging data from a device under charge for adaptive power supply tuning of the variable DC supply; and tuning the variable DC supply base on the received charging data.

41. The method according to claim 34, wherein the output network further comprises: providing a second transistor, wherein the second transistor has a second on state and a second off state; providing a second load network capacitor coupled between a drain of the second transistor and ground; providing a second load network inductor, wherein the second load network inductor is in series between the drain of the second transistor and the transmitting coil block; and driving a second gate of the second transistor with the driving source, wherein when the second transistor is in the second on state the second transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the second transistor is in the second on state the second transistor has a low voltage and high current across the second transistor, wherein when the second transistor is in the second off state the second transistor has a low current and high voltage across the second transistor.

42. The method according to claim 41, further comprising: providing a second choke inductor coupled between the drain of the second transistor and the DC supply.

43. The method according to claim 34, wherein the output network further comprises: providing at least one additional transistor, wherein the at least one additional transistor has an at least one additional on state and an at least one additional off state; providing at least one additional load network capacitor coupled between a drain of a corresponding at least one additional transistor and ground; providing at least one additional load network inductor, wherein the at least one additional load network is in a series between the drain of the at least one additional transistor and the transmitting coil block; and driving the at least one additional gate of the at least one additional transistor with the driving source, wherein when the at least one additional transistor is in the at least one additional on state the at least one additional transistor supplies current to the output network and the output network drives the transmitting coil, wherein when the at least one additional transistor is in the at least one additional on state the at least one additional transistor has a low voltage and high current across the at least one additional transistor, wherein when the at least one additional transistor is in the at least one additional off state, the at least one additional transistor has a low current and high voltage across the at least one additional transistor.

44. The method according to claim 43, further comprising: providing at least one additional choke inductor coupled between the drain of the corresponding at least one additional transistor and the DC supply.

45. The method according to claim 26, wherein the transmitting coil block further comprises: a coil shunt capacitor coupled in parallel with the transmitting coil.

46. The method according to claim 26, further comprising providing a tuning circuit capable of receiving charging data from a device under charge for adaptive power supply tuning; and tuning the power supply based on the received charging data.

47. The method according to claim 26, further comprising providing a tuning circuit capable of receiving voltage and current data from across the transmitting coil and voltage data from across the transistor as input for adaptive power supply tuning; and tuning the power supply based on the voltage and current data from across the transmitting coil and voltage data from across the transistor.

48. The method according to claim 34, further comprising providing a tuning circuit capable of receiving output current of the power supply and voltage across the transmitting coil for adaptive supply tuning; and tuning the power supply based on the output current of the power supply and voltage across the transmitting coil.

49. The method according to claim 26, wherein the driving source is an ac power source.

Description:

DESCRIPTION

METHOD AND APPARATUS FOR HIGH EFFICIENCY SCALABLE NEAR-FIELD WIRELESS POWER TRANSFER

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims the benefit of U.S. Provisional Application Serial No. 60/990,377, filed November 27, 2007, which is hereby incorporated by reference herein in its entirety, including any figures, tables, or drawings.

BACKGROUND OF INVENTION

Portable electronic devices such as laptop computers, LCD digital photo frames, mobile phones, and mp3 players require power to operate. Often, these devices use rechargeable batteries to provide power. The batteries are typically recharged by plugging a charger into the portable device or by removing the battery from the portable device and separately recharging the battery using a wired charger.

The cables that once restricted electronic devices are gradually being rendered unnecessary by wireless communication technology, and as the circuits that constitute the electronic devices shrink, only the power cords and batteries continue to restrict the portability of mobile electronic devices.

Current trends are leading towards going completely wireless. This means that portable devices can remain portable and can avoid having to 'plug-in' for power charging. Electro-magnetic inductive charging uses a coil to create an electromagnetic field across a charging station surface. The device then converts power from the electromagnetic field back into usable electricity, which is put to work charging the battery. Two coils are brought close to each other and when current is passed through one, the generated magnetic flux causes electromotive force to be generated in the other.

For charging of portable electronic devices and/or powering the portable electronic devices at close proximity, radio frequency charging appears to be a viable option. Recent improvements in efficiency have made it possible to consider radio frequency charging technology for commercial applications. However, there still exists a need in the art for a high efficiency low cost wireless power charging platform and components.

BRIEF SUMMARY

Embodiments of the present invention relate to a method and apparatus for wireless power transfer. Wireless power transfer systems in accordance with embodiments of the invention are capable of transmitting power to devices under charge through radio frequency charging. According to an embodiment, the wireless power transfer system of the present invention includes a switching mode amplifier and a low-Q output network. Embodiments of the present invention can follow class E amplifier designs while focusing on providing a low Q load.

In one embodiment of the present invention, a wireless transmitter includes a transistor block, a supply voltage block, and a transmitting coil block. The transistor block can include a transistor, load network capacitor, and a load network inductor. The transistor block can be scalable. The supply voltage block can include an RF choke inductor and a DC supply voltage. The supply voltage can provide tunable output power. The transmitting coil block can include a second load network capacitor, a transmitting coil, and a coil shunt capacitor.

In a further embodiment, multiple transistor blocks sharing the same load current can be used. Advantageously, the multiple transistor blocks can use a single DC supply voltage and transmitting coil block. Additional RF choke inductors can be added for each transistor block. The multiple transistor blocks can be incorporated to increase output power. In yet another embodiment, the DC supply voltage can be tuned to achieve high efficiency for a wide range of load conditions through adaptive power supply tuning. This can be accomplished though a feedback circuit involving a current monitor network, a voltage monitor network, and a receiver for receiving charging data of a device under charge.

BRIEF DESCRIPTION OF DRAWINGS

Figure 1 shows a planar wireless power transfer system according to an embodiment of the present invention.

Figure 2 shows ideal voltage and current waveforms to prevent simultaneous high voltage and high current in a transistor of a planar wireless power transfer system according to an embodiment of the present invention.

Figure 3 shows a schematic of a transmitter according to an embodiment of the present invention with three scalable transistor blocks.

Figure 4 shows a power delivery and efficiency plot of a two-scalable transistor block transmitter according to an embodiment of the present invention at 24 V, 36 V and 48 V supply voltage.

Figure 5 shows a power delivery and efficiency plot of a two-scalable transistor block transmitter according to an embodiment of the present invention with adaptive power control.

Figure 6A shows a system block diagram of a planar wireless power transfer system using adaptive power supply tuning according to an embodiment of the present invention.

Figure 6B shows a planar wireless power transfer system according to an embodiment of the present invention including current and voltage monitoring. Figures 7A and 7B show measurement results with different loads according to an embodiment of the present invention, where Figure 7A shows efficiency vs. power delivered to a load, and Figure 7B shows power supply voltage vs. power delivered to a load.

Figure 8 shows the efficiency at different power levels at a fixed power supply voltage of 48 V according to an embodiment of the present invention with no adaptive power supply tuning.

DETAILED DISCLOSURE

Embodiments of the present invention provide a method and apparatus for wireless power transfer. Specific embodiments of the present invention utilize radio frequency (RF) charging techniques. According to an embodiment of the present invention, a wireless power transmitter includes a transistor block providing a switching mode amplifier, and a low-Q output network including a tunable supply voltage. The combination of a switching mode amplifier and the low-Q output network provides high efficiency for power charging.

Potential uses for the subject invention include, but are not limited to, high efficiency and low cost wireless power charging platform for all portable devices such as laptop computers, LCD digital photo frames, mobile phones, mp3 players. With its high efficiency, energy loss via heating could be reduced. Further, embodiments of the subject invention can be implemented at home, in airports, and in hotel rooms. This would bring great convenience to general consumers, especially frequent travelers, as it would provide a universally charging interface and eliminate the need to bring multiple chargers. In addition, the scalable transmitter and power control design enables the transmitter system to be more flexible and adaptive to wider range of environmental situations while maintaining high energy efficiency.

Further, impedance tuning design enables the transmitter system to be more flexible and adaptive to wider range of loading conditions while maintaining high efficiency.

Figure 1 shows a schematic for a planar wireless power transfer system according to an embodiment of the present invention. Referring to Figure 1 , a transmitter of the power transfer system includes a transistor block and a low Q load network. A transmitting coil with shunt capacitor is connected to the low Q load network to transmit the signal from the power transfer system to a device under charge. The device under charge should include a receiving coil for receiving the signal transmitted by the transmitter. Advantageously, the low Q network is insensitive to a change in load. In particular, the transmitter is capable of providing a range of frequencies for the transmitted signal without causing a problem with respect to load matching.

The transistor block can receive a driving power source as input. For example, a wall outlet providing ac power can provide the driving power to the transistor block. In an embodiment, the transistor block can receive the input at the gate of a transistor. A variety of transistors can be utilized in the transistor block in accordance with embodiments of the invention. In a specific embodiment, the transistor can be an n-channel metal oxide semiconductor field effect transistor (NMOSFET). In another specific embodiment, an NPN BJT transistor can be used. The transistor block can amplify an input signal and operate as an on/off switch. The output network shapes the voltage and current waveforms to prevent a simultaneous high voltage and high current in the transistor. Figure 2 shows the ideal voltage and current waveforms to prevent simultaneous high voltage and high current in the transistor. This effect minimizes power dissipation, especially during the switching transitions. Unlike a conventional amplifier using a high-Q output network to reduce harmonics in wireless communications systems, embodiments of the present invention can use a low-Q output network to provide successful operation regardless of load condition. In a specific embodiment, the low-Q output network can also be dynamic.

According to embodiments of the present invention, a maximum value for Q can be about 10. In one embodiment, Q can be selected to be less than or equal to 10. In other embodiments, Q can be selected to be less than or equal to 8 or less than or equal to 5. In further embodiments, Q can be a range of 10-20, 2-4, or 1.8-5.

In one embodiment a single transistor is used for the transistor block. The single- transistor amplifier can be used to significantly reduce the circuit complexity. Although a

single transistor is illustrated in the embodiment shown in Figure 1, multiple transistors can also be used.

Embodiments of the subject invention may ensure that a low cost amplifier is able to operate at a wide dynamic range of frequency and load impedance. This is important because the load condition of the planar wireless power transfer system varies over a huge range depending on the device or devices it is powering/charging as well as the charging stage. Embodiments of the present invention have very simple hardware architecture and are able to work for a wide dynamic range of load impedance variation.

Embodiments of the subject invention provide a planar wireless power transfer system that is capable of charging portable devices as well as powering them at close proximity attaining 78% efficiency while delivering 68 W of power to an ideal load. A peak power of

132 W has been achieved using a planar wireless power transfer system according to an embodiment of the present invention. Another specific embodiment has achieved a peak power of 300W. Further, an embodiment can incorporate litz wire and achieve an efficiency of about 80%. Current existing products have not been able to achieve this level of efficiency and power output. The power capability with high efficiency makes the wireless power transmission system of the present invention suitable for charging laptop computers wirelessly.

According to an embodiment of the present invention, as illustrated in Figure 1 , the transmitter is designed in a hybrid class-E parallel amplifier topology.

The class E amplifier design equations provide:

where P is the power delivered to the load of resistance R, R is the load resistance (related to the transmitting coil and shunt capacitor), Vcc is the supply voltage, Qi is the load quality factor, and /is the operating frequency.

Assuming that the amplifier is ideal, P = V cc χ I DD

_ ; τ- 3.56 x V cc

DS SF / > «,« 1 D„S„ = 2 - 86 x /»

SF

where I DD is the supply current, Vcc is the supply voltage, Q L is the load quality factor, SF is

P the safety factor for the off nominal load condition range (typical value 0.75), - Dιssιpmtmn of f i s

the fraction of turn off power dissipation (typically < 1%), T is the period of the operating frequency, PeakVos is the peak drain to source voltage (the rating of the transistor), Peaklos is the peak drain to source current (the rating of the transistor), and tf /r is the fall time and rise time of the transistor (typically of similar value or order of magnitude).

Depending on the requirements, the transmitter can be designed for various maximum power output. In addition, by varying the supply voltage, the transmitter can tune its instantaneous power output to maintain its high efficiency while powering smaller devices such as PDA or cellular phone.

In a further embodiment of the present invention, the transistor block and low Q network of the power transfer system can be modified to achieve higher power output. In particular, the transistor block and low Q network can be provided as a scalable transistor block, tunable supply voltage block, and coil block, where the scalable transistor block

>ck and Cl and L2 from the low Q load

network, the tunable supply voltage block incorporates the DC supply and Ll from the low Q load network, and the coil block incorporates C2 from the low Q load network, the coil shunt capacitor, and the transmitting coil. Although the coil block is described as including the capacitor C2 from the low Q load network, the capacitor C2 can be considered part of the load network. The transmitting coil block, not including a receiver coil for a device under charge, can be viewed as part of the load network of the transmitter.

According to embodiments of the present invention, the power supplied from the transmitter can be increased by increasing the number of scalable transistor blocks while lower cost can be achieved by decreasing the number of scalable transistor blocks. Advantageously, a single tunable supply voltage block and coil block can be used for multiple scalable transistor blocks. For example, 2-5 scalable transistor blocks can be used, sharing the load current, with a single tunable supply voltage, load network capacitor (C2), transmitting coil and coil shunt capacitor.

Figure 3 shows a schematic of a transmitter with three scalable transistor blocks according to an embodiment of the present invention. Each scalable transistor block includes a transistor, a load capacitor Cl, and a load inductor Ll . The transistor can be a NMOSFET.

In one embodiment the NMOSFET can be an active device IRFP264NPbF. The load capacitor Cl can have a value of, for example, 3.3 nF, and the load inductor can have a value of, for example, 100 μH. A single variable DC supply can be used for tunable output power. The tunable supply voltage block includes the DC supply and an inductor for each scalable transistor block acting as an RF choke. The inductor acting as an RF choke can have a value of, for example, 500 μH.

A single coil block is connected to the three scalable transistor blocks. The coil block includes a transmitting coil, a coil shunt capacitor, and a load network capacitor C2. The load network capacitor C2 and the coils shunt capacitor can each have a value of, for example, 100 nF. In the embodiment shown in Figure 3, a buffer and input clock oscillator can be included as input to the scalable transistor blocks.

Although each scalable transistor block illustrated in Figure 3 is indicated as having an RF choke inductor, embodiments of the present invention are not limited thereto. For example, a single RF choke inductor can be shared by the scalable transistor blocks to reduce cost.

As indicated by Figure 3, the DC supply can provide tunable output power. The can be affected by the voltage of the DC

supply voltage. Figure 4 shows a power delivery and efficiency plot of a two scalable block transmitter at 24 V, 36 V and 48 V supply voltage. In particular, in Figure 4, the lower curve shows the 48V supply voltage results, the middle curve shows the 36V supply voltage results, and the upper left curve shows the 24V supply voltage results. As illustrated by the plots of Figure 4, an efficiency of about 78% is possible over a range of supply voltage. Figure 5 shows a power delivery and efficiency plot of a two scalable block transmitter according to an embodiment of the present invention with tunable power control. As illustrated by the plot shown in Figure 5, a high efficiency is possible over a large range of power.

This system has simple hardware architecture and each scalable block is a duplicate of each other that maintains the architecture of the transmitter. In addition, the power control enables high efficiency across a wide band power level. Therefore, it is able to achieve low cost for future custom design to meet various needs. Embodiments can also incorporate blocks that have different parameters, and that can be utilized together in various combinations. In this way, power delivery can be unevenly distributed. Further embodiments of the present invention can include adaptive power supply tuning. The adaptive power supply tuning can be performed on a modified switching-mode amplifier with low-Q output network. According to one embodiment of the present invention, the power supply voltage of a wireless transmitter is tuned based on the feedback from a receiver load, which is the device under charge, to optimize the efficiency. Referring back to Figures 1 and 3, since the power supply (labeled as DC supply) has a direct path to the transmitting coil via the switching mode amplifier, the input impedance of the transmitter seen by the power supply is related to the impedance of the transmitting coil. The impedance of the transmitting coil is related to the coupling coefficient of the coils as well as the receiver load impedance. The receiver load impedance varies with the input voltage to the receiver load's voltage regulator. By adjusting the load impedance, by tuning the power supply voltage, the load impedance seen by the transmitter can be closer to an optimal value. Accordingly, varying the DC supply in the embodiments shown in Figures 1 and 3, the voltage at the input of the receiver's voltage regulator will change, so as to change the impedance looking into the input port of the voltage regulator. According to embodiments of the present invention incorporating an adaptive power supply, the tuning system measures the voltage and current delivered to the receiver load and attempts to tune its impedance via varying the power supply voltage. Therefore, by tuning the power supply voltage, power

control as well as impedance tuning can be achieved. The adaptive tuning method can be implemented using a low cost microprocessor as well as a programmable switching regulator.

A block diagram of a planar wireless power transfer system using adaptive power supply tuning according to an embodiment of the present invention is shown in Figure 6A. Referring to Figure 6A, a wireless charger according to any embodiment of the present invention can be connected to an adaptive power control circuit. The adaptive power control circuit can include a programmable regulator and feedback network to set programmable regulator output voltage; a voltage monitor network and current monitor network that each receive the output voltage as input; and a microprocessor that receives input from the current monitor network and the voltage monitor network, and provides feedback to the feedback network. The microprocessor can also receive charging data from a device under charge. Examples of charging data that can be provided from the device under charge includes, but is not limited to, charge status, voltage provided to receiver, and/or current into the receiver. The device under charge can provide receiver charging data to a wireless transmitter. In other embodiments, other types of data links than wireless can be used. The charging data can then be received by a receiver of the adaptive power supply tuning circuit and provided to the microprocessor. The current monitor network can provide the power supply to the wireless charger. As examples, the output of the current monitor network in Figure 6A can be the DC supply of Figure 1 or the DC supply variable of Figure 3. In an embodiment, tuning of the transmitter can be accomplished using voltage and current monitoring. For example, as illustrated in Figure 6B, the voltage across the drain of the transistor and the voltage and current across the transmitting coil can be monitored. These monitored values can be used as input in a feedback system for tuning control. In another specific embodiment, the supply DC current and the voltage across the transmitting coil can be monitored and provided for tuning of the power supply, such as a DC power supply. The power supply can then be tuned by, for example, inputting the monitored data into a lookup table created based on a determination of desired efficiency and the output of the power supply tuned accordingly.

Figures 7A and 7B show measurement results for the embodiment of Figure 6A with different loads. Referring to Figure 7A, it is possible to maintain efficiency at over 75% in all conditions. Figure 7B shows power supply voltage vs. power delivered to the load. Power supply voltage is tuned to achieve high efficiency at each load condition.

As a comparison, Figure 8 shows the efficiency at different power levels when no adaptive power supply tuning is included. Here the power supply voltage is fixed at 48 V.

Previous planar wireless power transfer systems tend to suffer low efficiency at low output power, even though the efficiency at higher output power is higher. In contrast, embodiments of the present invention are capable of maintaining a high efficiency of over

75% across a wide range of output power levels. Current existing products cannot achieve this level of efficiency and power output. The adaptive power supply tuning according to embodiments of the present invention enables high efficiency across a wide range of output power levels. Therefore, embodiments of the present invention are able to achieve low cost for future custom designs to meet various needs.

All patents, patent applications, provisional applications, and publications referred to or cited herein are incorporated by reference in their entirety, including all figures and tables, to the extent they are not inconsistent with the explicit teachings of this specification.

It should be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in light thereof will be suggested to persons skilled in the art and are to be included within the spirit and purview of this application.