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Title:
METHOD AND APPARATUS FOR IMPLEMENTING DIGITAL OPTICAL LOGIC USING TERAHERTZ OPTICAL ASYMMETRIC DEMULTIPLEXERS
Document Type and Number:
WIPO Patent Application WO/2001/004693
Kind Code:
A2
Abstract:
A method and apparatus for implementing digital optical logic using terahertz optical asymmetric demultiplexers (TOADs). An apparatus is described for implementing, for example, the AND and INVERT logic operations using TOADs, such as, but not limited to, a Sagnac loop TOAD and a Mach-Zehnder TOAD.

Inventors:
PRUCNAL PAUL R (US)
Application Number:
PCT/US2000/018766
Publication Date:
January 18, 2001
Filing Date:
July 10, 2000
Export Citation:
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Assignee:
PRUCNAL PAUL R (US)
International Classes:
G02F3/00; H04B10/299; H04B10/50; G02F2/00; (IPC1-7): G02F/
Foreign References:
US4900115A1990-02-13
US5493433A1996-02-20
Attorney, Agent or Firm:
Rein, Barry D. (1155 Avenue of the Americas New York, NY, US)
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Claims:
Claims What is claimed is:
1. An optical AND gate for use in an optical digital logic system comprising: a TOAD having a data input port, a clock input port and an output port, wherein when a first optical signal representing a first logical data value, A, is input to the data input port, and a timed second optical signal representing a second logical data value, B, is input to the clock input port, the TOAD produces an optical signal on the output port representing the result, C, of A AND B.
2. The optical AND gate of claim 1 wherein the TOAD comprises: an interferometer having at least one data input port and at least one output port; splitting means connected to said input port for splitting each optical pulse applied to the data input port into a first pulse and a second pulse; one or more nonlinear optical elements positioned so that each of said first pulse and said second pulse must pass through at least one of said one or more nonlinear optical elements; a clock input port coupled to said one or more nonlinear elements, wherein an optical signal applied to the clock input port can be timed to cause said first and second pulses to interfere in a predetermined manner, and coupling means connected to said output port, configured such that if said first pulse and said second pulse interfere in the predetermined manner after each has passed through said one or more nonlinear elements, a light pulse passes through said at least one output port.
3. The optical AND gate of claim 1 wherein the TOAD is a Sagnac loop TOAD.
4. The optical AND gate of claim 1 wherein the TOAD is a MachZehnder TOAD.
5. A method for computing the logical AND of optical signals using a TOAD having a data input port, a clock input port and an output port, said method comprising the steps of: inputting a first optical signal representing a first logical data value, A, to the data input port, and inputting a second optical signal representing a second logical data value. B, to the clock input port that is timed such that the TOAD produces an optical signal on the output port representing the result, C, of A AND B.
6. An optical INVERT gate for use in an optical digital logic system comprising: a TOAD having a data input port, a clock input port and an output port, wherein a continuous optical signal is input to the data input port, and wherein when an optical data signal representing a logical data value, B. is input to the clock input port, the TOAD produces an optical signal on the input port representing the result, D, of INVERT (B).
7. The optical INVERT gate of claim 6 wherein the TOAD comprises: an interferometer having at least one data input port and at least one output port; splitting means connected to said input port for splitting each optical pulse applied to the data input port into a first pulse and a second pulse; one or more nonlinear optical elements positioned so that each of said first pulse and said second pulse must pass through at least one of said one or more nonlinear optical elements; a clock input port coupled to said one or more nonlinear elements, wherein an optical signal applied to the clock input port can be timed to cause said first and second pulses to interfere in a predetermined manner, and coupling means connected to said output port, configured such that if said first pulse and said second pulse interfere in the predetermined manner after each has passed through said one or more nonlinear elements, a light pulse passes through said at least one output port and if they do not interfere in the predetermined manner a light pulse is reflected back through the input port.
8. The optical INVERT gate of claim 7 wherein the TOAD is a Sagnac loop TOAD.
9. The optical INVERT gate of claim 8 further comprising a coupler for directing a portion of reflected pulses to a path different from the one through which the optical data signal is supplied.
10. The optical INVERT gate of claim 8 further comprising an isolator that isolates reflected pulses from a path through which the optical data signal is supplied.
11. The optical INVERT gate of claim 7 wherein the TOAD is a MachZehnder TOAD.
12. The optical INVERT gate of claim 7 wherein the continuous optical signal is a continuous wave signal.
13. The optical INVERT gate of claim 7 wherein the continuous optical signal is a pulsed optical signal.
14. A method for computing the logical INVERT of an optical signal using a TOAD having a data input port, a clock input port and an output port, said method comprising the steps of : inputting a continuous optical signal to the data input port, and inputting an optical data signal representing a logical data value, B, to the clock input port such that the TOAD produces an optical signal on the data input port representing the result, C, of INVERT (B).
15. The method of claim 14 further comprising the step of coupling the optical signal produced by the TOAD onto a path different than the one on which the optical data signal is supplied.
16. The method of claim 14 further comprising isolating the optical signal produced by the TOAD from subsequent optical data signals.
17. An optical logic gate for use in an optical digital logic system comprising: a TOAD having a data input port, a clock input port and an output port, wherein when a first optical signal representing a first logical data value, A, is input to the data input port, and a second optical signal representing a second logical data value, B, is input to the clock input port, the TOAD produces an optical signal on one or more of the output port and the input port representing the result, C, of a logical operation on one or more of A and B.
18. The optical logic gate of claim 17 wherein one of the first logical data value and the second logical data value is fixed.
19. The optical logic gate of claim 17 wherein the first optical signal is a continuous signal.
20. The optical logic gate of claim 17 wherein one of the first and second optical signals is a continuous signal.
21. The optical logic gate of claim 17 wherein the TOAD comprises: an interferometer having at least one data input port and at least one output port ; splitting means connected to said input port for splitting each optical pulse applied to the data input port into a first pulse and a second pulse; one or more nonlinear optical elements positioned so that each of said first pulse and said second pulse must pass through at least one of said one or more nonlinear optical elements; a clock input port coupled to said one or more nonlinear elements, wherein an optical signal applied to the clock input port can be timed to cause said first and second pulses to interfere in a predetermined manner, and coupling means connected to said output port, configured such that if said first pulse and said second pulse interfere in the predetermined manner after each has passed through said one or more nonlinear elements, a light pulse passes through said at least one output port.
22. The optical logic gate of claim 17 wherein the TOAD is a Sagnac loop TOAD.
23. The optical logic gate of claim 17 wherein the TOAD is a MachZehnder TOAD.
24. A method for computing a logical operation on optical signals using a TOAD having a data input port, a clock input port and an output port, said method comprising the steps of : inputting a first optical signal representing a first logical data value, A, to the data input port, and inputting a second optical signal representing a second logical data value, B, to the clock input port that is timed such that the TOAD produces an optical signal on one or more of the output port and the input port representing the result, C, of a logical operation on one or more of A and B.
25. The optical logic gate of claim 17 wherein one of the first logical data value and the second logical data value is fixed.
26. The optical logic gate of claim 17 wherein the first optical signal is a continuous signal.
27. The optical logic gate of claim 17 wherein one of the first and second optical signals is a continuous signal.
Description:
Method and Apparatus for Implementing Digital Optical Logic using Terahertz Optical Asymmetric Demultiplexers Field of the Invention This invention relates to optical digital logic devices, and more particularly to optical computing using terahertz optical asymmetric demultiplexers.

Background Any logic function can be implemented using combinations of three fundamental Boolean operations: AND. OR, and INVERT. Current electronic computing technology demonstrates the powerful capabilities and possibilities of implementing and combining these simple operations. There are, however, few optical devices that allow for optical computing.

As shownin Fig. 1, the OR function can be implemented using a fused optical coupler I 10. If an optical signal is present on either input A or input B an output will appear on output C.

The AND and INVERT functions are much more difficult to implement all-optically however. One device that shows promise in implementing these basic logic functions optically is the Terahertz Optical Asymmetric Demultiplexer (TOAD). Several types of TOAD implementations based on different interferometer configurations are described in, for example, U. S. Patent No. 5,493,433 to Prucnal et al.. and U. S. Patent No. 5,825,519 to Prucnal, the contents of which are incorporated herein in their entirety by reference.

Summary The present invention is directed to a method and apparatus for implementing digital optical logic using terahertz optical asymmetric demultiplexers (TOADs). An apparatus for implementing the AND and INVERT logic operations using TOADs is described. Preferred embodiments use a Sagnac loop TOAD and a Mach-Zehnder TOAD, but TOADs based on different interferometer configurations may be used.

Brief Description of the Drawings FIG. 1 depicts a logical"OR"gate using a passive optical coupler.

FIG. 2 depicts logical"AND"and"INVERT"gates using a loop TOAD.

FIG. 3 depicts a truth table demonstrating the INVERT operation via a loop TOAD.

FIG. 4 depicts logical"AND"and"INVERT"gates using a Mach-Zehnder version of a TOAD.

Detailed Description of Preferred Embodiments As used herein, a TOAD is an optical device having a data signal input port, a control signal input port, one or more non-linear elements, each having a first state in which light passing through it is substantially unchanged and a second state in which a characteristic of the light passing through it is changed, and an output port. The data input port, the control input port and the output port are coupled to at least one of the one or more non-linear elements such that at least two optical paths are formed from the data input port to the output port each including a non-linear element. A control signal input at the control input port causes the non-linear element in each path to change from its first state to its second state. An optical data signal input to the data input port will produce an output data signal on the output port if light on the two optical paths arrives at the output port having passed through different non-linear element states. The optical paths may include the same non-linear element or elements or different elements. If the light signals on the two optical paths do not pass through different non-linear element states, substantially no output data signal is produced on the output port.

FIG. 2 shows an implementation of an all optical AND and INVERT gate in accordance with the present invention. This implementation uses a Sagnac loop TOAD, operation of which is described in U. S. Pat. No. referenced above. The semiconductor optical amplifier (SOA) shown in FIG. 2 operates in the same manner as the nonlinear optical element (NLE) described in U. S. Pat. No. 5,493,433.

As shown in FIG. 2, the data and clock inputs of TOAD 205 are used to input the two logic levels of an optical"AND"gate: inputl A and input2 B, respectively. The output port 250 of TOAD 205 outputs the result of the AND operation. (A TOAD is typically used to perform optical demultiplexing of an incoming data pulse train on its data input by sending in properly timed clock pulses on its clock input, which in turn produces an output on its output port for selected pulses.) The output on port 250 passes through filter 265, which filters out the clock (input2 B) signal and produces output C. Filter 265 may be, for example, a

polarization filter, a wavelength filter, or any other type of suitable filter, depending on how the data (inputl A) signal and clock (input2 B) signal are differentiated.

In the case where input 1 A and input2 B are logic'1', where a logic'1'means an optical signal, or light pulse, is present and a logic'0'means no optical signal is present, the inputl A light pulse enters coupler 210 through input port 245 and is split into two counter- propagating pulses 215 and 220. The input2 B light pulse enters coupler 230 and is timed so that SOA 225 becomes saturated after pulse 220 has passed through SOA 225 but before pulse 215 has passed through it. Pulse 215 will accordingly experience a phase shift after passing through the saturated SOA and the two counter-propagating pulses 215 and 220 will interfere at coupler 210 in such a way that substantially all of the incident optical power emerges from output port 250.

In the case where input2 B is logic 0 then SOA 225 does not become saturated. and the two counter-propagating pulses 215 and 220 will interfere in such a way that substantially all of the incident optical signal re-emerges from input port 245 and substantially no optical signal emerges from output port 250.

In the case where inputl A is logic 0, then no counter-propagating pulses are generated and no optical data signal emerges from output port 250.

Thus, without inputl A (data input), no pulse can propagate through to the output port 250. If input2 B (clock input) is logic 0, SOA 225 never saturates and no pulse will propagate through to the output port 250. Thus, a pulse only appears as output C when both inputs are present; i. e., the FIG. 2 loop TOAD configuration can be used as an optical AND gate. FIG. 3 shows the truth table of the AND function using the loop TOAD.

FIG. 2 also illustrates an all optical INVERT gate in accordance with an embodiment of the present invention. During conventional TOAD operation, data pulses are gated through to the demultiplexing output port 250 and non-gated data pulses are reflected back to the data input port 245. For INVERT gate operation, a second coupler 235 is attached to the data input port 245 to direct the reflected pulses to a new coupled output port 260. The output on port 260 passes through filter 275, which filters out the clock pulses and produces output D.

Output D is the complement of output C (i. e., if output C is designated'output', output D is output). Isolator 285 prevents reflected pulses from interfering with the source of data input pulses

A continuous wave (CW) optical signal or continuous series of data pulses are supplied on data input 1 A.

When clock input2 B is present (i. e., logic"1"), data inputl A is gated through to output port 250 and substantially no data signal will be reflected back to output port 260, i. e.. output port 260 will carry logic 0. When clock input2 B is absent (i. e., logic"0"), inputl A will not be gated to output port 250. Output port 250 will then carry no pulse ("0"), and the output port 260 will carry the reflected pulse ("I").

Thus, output port 260 carries the logical inverse of input2 B provided that inputl A is is present at all times required for the sampling of output port 260. Without inputl A, output port 260 would never carry a'1', regardless of the state of input2 B. FIG. 3 also shows the truth table of the INVERT function using the loop TOAD.

Other types of TOADs, such as, but not limited to, a Mach-Zehnder TOAD. may be used in alternative embodiments of the present invention. For background information on Mach-Zehnder TOADs, see U. S. Pat. No. 5,825,519, referenced above.

FIG. 4 shows an alternative embodiment of the subject invention using a Mach- Zehnder TOAD. As with the loop TOAD, the data and clock inputs to the Mach-Zehnder TOAD are used to input the two logic levels of an optical AND gate: inputl A and input2 B, respectively, and the output is provided on output port 410. The optical signal input to data inputl A is split into two signals at coupler 440. Each signal travels through a respective upper or lower optical path and through a respective NLE/SOA 450 in each path. The signals from the upper and lower optical paths interfere with each other at coupler 430. The data signals will interfere constructively if a properly timed control input2 B is present and exit through output port 460 and then output port 410 of coupler 470. The data signals will interfere destructively if a properly timed control input2 B is not present and exit through output line 420. Thus, output port 410 only carries an output signal (logic'1') if there is input from both inputl A and input2 B. Thus, in a manner analogous to that of the loop TOAD, the Mach-Zehnder TOAD can be used as an optical AND gate.

FIG. 4 also illustrates an INVERT gate using a Mach-Zehnder TOAD in accordance with an embodiment of the present invention. In one embodiment, a CW optical signal or series of data pulses are supplied on data inputl A.

When input2 B ("I") is present, inputl A is gated through to output port 460 and then to output port 410 and no optical signal is gated to output port 420 (the alternate port) (i. e., a logic'0'is output on port 420). When input2 B is absent ("0") coupler 430 outputs substantially all of the signal on the output port 420 (i. e., a logic'1'is output on port 420).

Thus, output port 420 outputs the logical inverse of input2 B, provided that inputl A is present. FIG. 3 also shows a truth table of the INVERT function for the Mach-Zehnder TOAD.

Other configurations of an INVERT gate using a Mach-Zehnder TOAD are also possible. For example, depending upon the initial bias in the arms of the Mach-Zehnder interferometer, the alternate arm of the second coupler 430 could represent the inverse of the clock input, input2 B.

Using the above-described all-optical AND, INVERT and OR gates, more advanced digital systems (such as logic circuits, digital processing, and computing subsystems) can be constructed. For example, serial optical processing consisting of optical logic gates combined with feedback can implement complex processing functions.

One of the issues in implementing digital processing logic using a TOAD device is the recovery time of the nonlinear element used within the TOAD. However, recent experimental demonstrations have shown that this recovery time can be reduced significantly using optical techniques. See R. J. Manning, D. A. O. Davies, D. Cotter, and J. K. Lucek, "Enhanced recovery rates in semiconductor laser amplifiers using optical pumping," Electronics Letters, vol. 30, no. 10, May 1994.

It should be understood that the foregoing description is only illustrative of the invention and do not limit the scope of the invention. Various alternatives and modifications that do not depart from the invention will be apparent to those skilled in the art. For instance, the optical loop and couplers employed herein may be a fibre loop, an integrated optical waveguide, a free space configuration using appropriate mirrors and beam splitters, or any other suitable device or configuation. It is intended that all such modifications fall within the scope of the appended claims.




 
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