FIELD

[0001] Subject matter disclosed herein relates generally to electronic systems ami devices and, more particularly, to techniques and circuits for recovering from errors in electronic systems and devices caused by interference and/or electrical or mechanical overstress conditions.

BACKGROUND

[0002] Electronic systems and devices may be subject to interference and electrical or mechanical overstress conditions that undesirably alter their operational states. One area of electronics that is particularly prone to such stresses is automotive sensors. In automobiles, a combination of multiple mechanical and electrical systems are installed in close proximity and operated in varied environments. This creates an increased likelihood of electrical interference and sudden motion that can result in errors within a sensor. In many cases, a sensor will return to normal operation after a stress is applied. However, in some circumstances, (he stress may cause a change to an electronic component or device that does not allow the sensor to return to correct operation without additional intervention. As can be appreciated, errors induced in this manner are undesirable in all electronics applications, bat they are of particular concern in applications where human safety is involved, such as automobiles and other vehicles.

[0003] While many techniques exist for storing electronic data, contemporary circuit design overwhelmingly favors the use of digital circuitry to perform this function. In a sensor based application, the information being stored within digital storage circuitry may include the operational state of the sensor circuitry state information within the state register of a state machine) and/or information about sensor inputs (e.g., sensor mjfonnation stored since power on). Alteration of any of this data can lead to a malfunction of the sensor or other system. There is a need for techniques and circuits for identifying the occurrence of errors in electronic systems caused by overstress conditions. There is also a need for techniques and circuits for recovering from such errors. SUMMARY

[0004] In accordance with one aspect of the concepts, systems, circuits, and techniques described herein, an electronic system comprises: first digital storage circuitry to store a current operational state of the electronic system; operational logic to determine a next operational state of the electronic system baaed, at least in part, on an input signal; redundancy logic to generate redundant information associated with the next operational state determined by the operational logic; second digital storage circuitry to store the redundant information; and error checking logic to process the current operational state stored in the first digital storage circuitry and the redundant information stored in the second digital storage circuitry to determine whether a error exists in the electronic system, the error checking logic including correction logic to initiate corrective action for the electronic system if an error is detected by the error checking logic.

[0005] In one embodiment, the correction logic is configured to initiate a system reset of the electronic system if an error is detected by the error checking logic.

[0006] In one embodiment, the correction logic is configured to send an alert to an operator of the electronic system if an error is detected by the error checking logic.

[0007] In one embodiment, the correction logic is configured to modify the current operatiooal state information stored in the first digital storage circuitry to a safe state that will not produce future errors in the electronic system if an error is detected by the error checking logic.

[0008] In one embodiment, the correction, logic is configured to perform an error correction operation to correct the current operational state information stored in the first digital storage circuitry if an error is detected by the error checking logic.

[0009] In one embodiment, the input signal of the operational logic is derived from an output signal of at least one sensing element.

[00010] In one embodiment, the input signal of the operational logic is derived from an output signal of at least one magnetic field sensing element

[0011] In one embodiment, the at least one magnetic field sensing element includes at least one of a Hall effect element, a magnetoresistance element, or a magnetotransistor.

2 [0012] In one embodiment, the redundant information generated by the redundancy logic includes a parity bit

[0013] In one embodiment, the redundant information generated by the redondancy logic includes a checksum.

[0014] In one embodiment, the redundant information generated by die redundancy logic includes an error detection code

[0015] In one embodiment, the redundant information generated by the redundancy logic includes an error correction code.

[0016] In one emrxxliment, the redundant mformation generated by the redundancy logic includes a full copy of the next operational state information determined by the operational logic.

[0017] In one embodiment, the operational logic include* at least one stale machine.

[0018] In one emrxxhment, the operational logic is configured to determine the next operational state of the electronic system based on the input signal and the current operational state of the electronic system.

[0019] In one emrxxliment, the first digital storage circuitry is different from the second digital storage circuitry.

[0020] In one embodiment, the first digital storage circuitry includes an operational register and the second digital storage circuitry includes a redundancy register that is different from the operational register.

[0021] In accordance with another aspect of the concepts, systems, circuits, and techniques described herein, a method for use in detecting and recovering from errors in an electronic system comprises; receiving one or more inputs signals; processing the one or more input signals to determine a next operational state associated with the electronic system; storing the next operational state mformation; processing the next operational state information to generate redundant infortnarion; storing the redundant mformation;

processing the stored operational state information with the stored redundant information to determine whether one or more errors exist in the operational state information; and initiating corrective action if one or more errors are detected in the stored operational state information.

3 [0022] In one embodiment, the method further comprises repeating receiving, processing the one or more input signals, storing the next operational state information, processing the next operational state information, storing the redundant information, and processing the stored operational state information with the stored redundant information if no errors are detected in the stored operational state information.

[0023] In one embodiment, initiating connective action includes initiating a system reset if one or more errors arc detected in the stored operational state information.

[0024] In one cmbodimeni, initiating corrective action includes sending an alert to an operator of the electronic system if one or more errors are detected in the stored operational state information,

[0025] In one embodiment, initiating corrective action includes modifying the stored operational state information to a safe state that will not produce future errors in the electronic system if one or more errors are detected in the stored operational state information.

[0026] In one embodiment, initiating corrective action includes performing an error correction operation to correct the stored operational state information if one or more errors are detected in the stored operational state information.

[0027] In one embodiment, receiving one or more inputs signals includes receiving one or more inputs signals that are derived from an output signal of at least one sensing element.

[0028] In one embodiment, receiving one or more inputs signals includes receiving one or more inputs signals mat are derived from m output signal of at least one magnetic field sensing element, the at least one magnetic field sensing element including at least one of: a Hall effect element, a magnetoresistance element, or a magnetotransistor.

[0029] In one embodiment, processing the next operational state information to generate redundant information includes processing the next operational state information to generate a parity bit.

[0030] In one embodiment, processing the next operational state information to generate redundant information includes processing the next operational state information to generate a checksum.

4 [0031] In one embodiment, processing the next operational state information to generate redundant information includes processing the next operational state information to generate an error detection codeword.

[0032] In one embodiment, processing me next operational state infonnation to generate redundant information includes processing the next operational state information to generate an error correction codeword.

[0033] In one embodiment, processing the next operational state information to generate rofcadarit information includes making a copy of to next operational state information.

BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The foregoing features may be more fully understood from the following description of the drawings in which:

[0035] Fig. 1 is a block diagram illustrating an exemplary system for detecting and recovering from errors caused by electrical and/or mechanical stresses in accordance with an embodiment; and.

[0036] Fig. 2 is a flow diagram iUustrating a process for detecting and recovering from errors in an electrical system in accordance with as embodiment

DETAILED DESCRIPTION

[0037] Techniques, devices, and circuits described herein relate to the detection of and recovery from mors in electronic systems caused by electrical, mechanical, and/or thermal stresses applied to the systems during operation. In some embodiments, the techniques, devices, and circuits may be implemented within systems that ¾se sensor elements to detect and measure one or more operational parameters of a larger system (e.g,, a magnetic position sensor system for use in automobile applications, etc.). m the discussion mat follows, various principles, techniques, features, and circuits will be described in the context of sensor based systems. It should be appreciated, however, that many other applications also exist

5 [0038] In SB. electronic system, operational data is often stored in oae or more digital memory locations or registers during system operation. The operational data thai is stored within. ass electronic system at & particular point in time may be referred to as the current "state," or "logic state," or "operational stale" of the system. If one or more stresses occur during system operation, such as external noise, interference, or physical impact on the system, errors may occur in the stored values that can negatively affect system operation. In some cases, the negative effect may be short-lived, lasting only as long as the external stimulus itself. In other cases, the error may affect operation over an extended time period, causing major operational errors or complete breakdown of the system.

[0039] In some electronic systems, the system may only be capable of operating in a fiaite nwnhac of operational states (e.g., a finite state machine), is such s system, a next state may depend, for example, on a current state of the system and current inputs to the system. The inputs to the system may be related to, for example, measurements of one or more operational parameters of the system made by sensor elements in the system, or some other data. After a next operational state has been determined for the system, state information may be stored within one or more state registers (or other digital storage locations) of the system. As will be appreciated, any errors that occur in the state isfonnation stored in a system may impact future operation of the system. That is, incorrect state information may cause a system to think that it is in a different state than it actually is, thus causing all future states, and decisions made based on those states, to be in error. Therefor©, it is desirable that such errors be detected and appropriate corrective action be taken as early &e possible.

[0040] Fig, 1 is a block diagram illustrating an exemplary electronic system 10 that is capable of detecting and recovering from errors in logic state caused by electrical and/or mechanical stresses in accordance with an embodiment. electronic system 10 of Fig. 1 may be, for example, a sensor system for use within an automobile or other vehicle, although other types of systems may alternatively be used. An exemplary sensor system that could benefit from the principles and techniques described herein is described in U.S.

Patent No. 5,650,719, which is co-owned with the present application and is hereby incorporated by reference in its entirety. As shown in Fig. 1, system 10 may include:

operational logic 12, an operational register 14, redundancy logic 16, a redundancy register 18, and error checking logic 20. System 10 is capable of being in any of a number of different operational states at a particular point in time. Operational register 14 is operative for storing a current operational state of system 10. Operational logic 12 is operative fox determining a next operational state of system 10 based on, for example, a current operational state of the system and current system inputs. Operational logic 12 may include, for example, combinational logic circuitry in some implementations. As will be described is greater detail, redundancy logic 16, redundancy register 18, and error checking logic 20 may be used to identify errors in logic state information stored in operational register 14 before the errors have a chance to compromise system operation. Error checking logic 20 may also include circuitry for initiating corrective action when errors are detected is. the system state information.

[0041] In sensor-based applications, the information stored within operational register 14 may include, or be derived from, information collected by one or more sensor elements 26 in system 10. Borne or all of the information stored within operational regoster 14 may also include state information associated with one or more state machines of system 10. As described above, operational logic 12 is operative for determining a next operational state of system 10. Operational logic 12 may also be operative for generating the output of system 10 (e.g., a sensed signal, etc.). As shown, operational logic 12 may receive input information at an input port 22 for use in determining me next operational state.

Operational logic 12 may also receive information identifying the current operational state of system 10 at a second input 24. Operational logic 12 may use the input information and/or the current state information to determine the next operational state.

[0042] After operational logic 12 has determined the next operational state, the state information may be stored within operational register 14, Once stored in operational register 14, the next operational state becomes the current operational state of system 10. As shown, the current operational state stored in operational register 14 may be coupled back to input 24 of operational logic 12 for use in detennining a next operational state. In some embodiments, system 10 of Fig. 1 may be a synchronous circuit operating in conjunction with a clock signal. In these implementations, a new operational state may be stored in operational register 14 for each new clock cycle. Non-synchronous

implementations also exist.

[0043] In some embodiments, the operational state information stored within operational register 14 may include state information for the full electronic system that includes the register 14 (e.g., a magnetic Held sensor within an automobile, etc.). In other embodiments, operational register 14 may include only a portion of the state information of the fell system (e.g., the operational state of a single state mscMae is the system, information associated with a particular measured parameter in the system, etc.). Is some implementations, multiple different versions of system 10 of Fig. 1 may be present within a larger system to detect errors ia different portions of the state information of the larger system.

[0044] As described above, In some embodiments, some or all of the information stored within operational register 14 may be state information associated with a state machine of the underlying system. In such embodiments, operational logic 12 may determine the next operational state based on the current operational state of system 10 and input information received at input 22. That is, given the current state of the state machine, the input information may dictate which next state the state machine is to enter.

[0045] In other embodiments, some or all of me operational state information stored in operational register 14 may be related to measurements of operational parameters made by sensor elements 26 associated with system 10. For example, in a proximity detector mat is designed to detect the approach and retreat of individual teeth of a rotating gear based on magnetic fields, the detector may keep track of the maximum and minimum. magnetic Held intensities measured during the detection process to establish, for example, detection thresholds. This maximum and minimum magnetic field intensity information may make up part of the current operational state of system 10 stored in operational register 14, m some sensors, instead of detecting gear teeth, the sensor may detect the different magnetic domains of a rotating ring magnet. In these sensors, maximum and minimum magnetic field intensities may also be tracked, and these values may also make up part of the current operational state of the sensor system. Other or alternative types of measured parameter data may also be part of the state information stored in operational register 14 in other embodiments,

[0046] In some operational scenarios, external stresses may be placed upon system 10 that cause the state information stored within operational register 14 to have one or more errors. For example, large interference signals that occur during a write operation may eatsse data to be incorrectly recorded within a register or memory location. In some cases, interference may also cause information already stored within a register or memory to change state. Once an incorrect value is stored within operational register 14, subsequent operation of system 10 may be corrupted. That is, all future state exterminations of operational logic 12 may be based upon an incorrect current state. In this manner, the current error can carry through to all future system operation unless corrective action is taken, For example, if the system 10 includes a state machine, external stresses may cause an incorrect state to be stored in operational register 14 for the state machine. Because the current state is incorrect, all future state determinations made by operational logic 12 may also be incorrect. Similarly, if maximum magnetic Held intensity information is stored in operational register 14 for use in detection threshold determmation, external stresses may cause the maximum intensity value to be increased by a large amount. This error may then cause incorrect threshold values to be calculated in all subsequent operation.

[0047] To prevent problems related to errors in state information, redundancy logic 16, redundancy register 18, and error checking logic 20 may be used to identify errors in the stored state information before they have a chance to compromise subsequent system operation, in some implementations, redundancy logic 16, redundancy register 18, and error checking logic 20 may be made a part of an initial system design. In other implementations, redundancy logic 16. redundancy register \ 8, and error checking logic 20 may be added to an already existing system as a retrofit, without impacting the existing system design.

[0048] As shown in Fig. 1 , redundancy logic 16 may be coupled to receive state information associated with a next operational state from operational logic 12.

Redundancy logic 16 may use this state information to generate redundant information.

The redundant information may take many forms and is selected to be useable by error checking logic 20 to identify errors in the stored state information. The redundant information may then be stored within redundancy register 18 at about the same time that the state information for the next operational state is stored in operational register 14.

Error checking logic 20 may continually process the redundant information stored in redundancy register 18 and the state information stored in operational register 14 to determine whether an error has occurred in system 10. If the two pieces of information are not compatible, then it may be assumed that an error has occurred and correction logic 28 within error checking logic 20 may initiate corrective action. If the two pieces of information are compatible, then correction logic 28 may allow system 10 to continue operating in its normal manner. In at least one implementation, error checking logic 20 may process the redundant information and the state information to check for an error condition for each cycle of a clock signal, although other tirniug schemes may alternatively be used.

[0049] The redundant information generated by redundancy logic 1.6 may lnci¾de any type of Information that may subsequently be used to "check" rise accuracy of the state information stored within operational register 14. IB a relatively simple implementation, the redundant information may include a single parity bit. The parity bit may be generated, for exaraple, so that the bits of the next operational state determined by operational logic 12 _» plus the parity bit, will result in an even (or odd) number of ones. The parity bit may be stored within redundancy register 18. When a parity bit is used, error checking logic 20 may perform an error check by, for example, retrieving state information, from operational register 14 and the parity bit from redundancy register 18 and deterrsrinirsg whether the total number of ors.es for both pieces of information is even (or odd). If not, it may be assumed that at least one error exists in the state information and corrective action may be Initiated. As will be appreciated, the parity bit approach will not work if there are two bit errors (or as even number of bit errors) within the state information,

[0050] Is some embodiments, one or more error detection or error correction codes may be used to generate the redundant information. As is known, various error detection codes exist that allow a user to detect m ultiple errors* within corresponding Information (e.g., checksum codes, cyclic redundancy checks, hash functions,, etc,), typically up to a maximum number of errors. In. some implementations, redundancy logic 16.may generate the redundant portion, of aa error detection codeword for the next operational state and store the redundant portion In redundancy register 18. Error checking unit 20 may rises execute a corresponding error detection process using fee information from operational register 14 and redundancy register 18 to determine whether any errors exist in the state inform ation.

[0051] Error correction codes that are capable of detecting and also correcting errors in the state information may be used in some implementations. When an error correction code is ased to generate fee redundant iaformatiori,, error checking logic 20 may, is some embodiments,, only use the error detection capability of the code to detect errors in the state information. In other implementations, however, the error correcting capabilities of the code may be used to correct the state mformation stored within. operational register 14 as part of the corrective action of error checking logic 20,

[0052] In some embodiments, fee redundant information stored in redundancy register 18 may include a full copy of the next operational state information generated by operational logic 12, is these embodiments, fee error check performed by error cheeking logic 20 may comprise a simple bit by bit comparison. As will be appreciated, the method selected to provide the redundant infbrmadon is a particular implementation will typically depend on factors such, as the frequency of undetected errors that is deemed tolerable In the system, the computational resources that are available for forming and processing tbe redundant: information, the electrical power available to power the computational resources, the speed with which the redundancy/detection calculations can be performed, and/or other factors.

[0053] As described above, errors within fee state information stored within operational register 14 are undesirable because they can compromise both present and future operation of the system. Therefore, the corrective actios feat Is initiated by error checking unit 2.0 when one or more errors are detected may be directed toward placing the system 10 back into a safe state that will not compromise future operation. la at least aae implementation, error checking unit 20 may initiate a full system reset when oae or more errors are detected within the state information. When a system reset is performed, a recalibratioa process may be initiated where all current state information will be replaced based on newly received input 22, Therefore, the effects of the errors in the operational state information will be fully removed from the system,

[0054] Is some implementations, the corrective action initiated by error checking logic 20 may include setting some or all of the operational state information within operational register 14 to a "safe" value that will not carry over into future operations. This maybe performed without requiring a full system reset. For example, in oae implementation, the state information stored within operational register 14 may Include information that tracks a peak magnetic field reading of one or more sensor elements within system 10. If an error is subsequently identified within the state information, the peak magnetic field information may be reset to a low value that will not create errors in the future (e.g., a value that is known to be lower than typical peak magnetic field readings in the system). In some other implementations, the corrective action initiated by error checking logic 20 may include sending as alert message to a user of system 10 to inform the user of the error(s) and to allow the user to take further corrective action. As described above, in ntill other implementations, the state information within operational register 14 may bo corrected using the error correction capability of as error correction code. Other corrective actions may alternatively be takes.. la addition, combinations of the above described corrective actions may alternatively be used.

[0055] Although described above as separate registers, it should be appreciated that the functions of operational register 14 and redundancy register 18 may be realized using any of a wide variety of different data storage configurations. That is, these storage functions may bo provided using any ty pe of digital data storage de vice, or combination of data storage devices, that are capable of achieving the necessary storage and retrieval speeds. For example, is one approach, the functions of operational register 14 and redundancy register 18 may he realised using a single register. Is some embodiments, the functions of one or both of the registers 14, 18 may be realized using multiple separate data storage devises and/or memory locations within system 10. The fractions of the two registers 14, 18 may, for example, be realized using multiple different locations within a common semiconductor memory device (e.g., RAM memory, flash memory, etc), likewise, memory locations within different semiconductor memories may be used. Ik some embodiments, flip flops may be nsed for operational register 1.4 sad redundancy reg!sier 18. Other forms of digital data storage, or combinations of different forms of digital data storage, may be used in other Implementations, In some embodiments, analog storage may be used for the redundant information.

[0056] In at least one implementation, system 10 of Fig, I may he part of an integrated circuit (IC) ha ving a predetermined inaction. For example, m one implementation, system 10 may he included within a sensor IC for ase ia sensing one or more operational parameters of a larger system. Is some implementations, system 10 may be adapted for use within vehicular applications that use sensors such as, for example, magnetic linear and angular position sensors, magnetic digital position sensors, current sensors, magnetic speed sensors, and/or others. Each of these types of sensors may make ase of one or more magnetic field sensing elements, which may include, for example, Hall effect elements, magaetoresistanee elements, magnetotransistor elements, and/or others, .in other implementations, system 10 assy be adapted for use in non-vehicular applications and/or non-sensor applications. In a mm-sensor application, fee inputs to operational logic 12 may be from a source ether than a sensing element

[0057] Fig. 2 is a flew diagram illustrating a process 30 for detecting and recowing from errors in an electronic system Is accordance wife an embodiment.

[0058] The reetangnlar elements (typified by clement 32 in Fig. 2) are herein denoted "processing blocks" and may represent computer software instructions or groups of lastractioss. It should be noted that the Sow diagrara of Fig. 2 represents me exemplary embmfcneat of a design described herein and variations in such a diagram, which generally follow the process outlined, are considered to be within the scope of the concepts, systems, and techniques described and claimed herein,

[0059] Alternatively, the processing blocks may represent operations or actions performed by fractionally equivalent circuits such as, for example, a digital signal processor (DSP), as application specific integrated circuit (ASIC), a field programmable gate army (FPGA), or other circuitry. Some processing blocks may be manually performed while other processing blocks may be performed, by a processor,, a circuit, or other machine. The flow diagram does not depict the syntax of any particular programming language. Rather, the flow diagram illustrates the functional information one of ordinary skill in the art respires to fabricate circuits and/or to generate computer software to perform fee required processing, it should be noted that many routine program elements, such as initialization of loops and variables aad fee use of temporary variables may sot be shown. It will, be appreciated by those of ordinary skill In fee ad that utx!ess otherwise radicated herein, the particular sequence described Is illustrative only aad can be varied, without departing from, the spirit of the concepts described and/οτ claimed herein. Thus,, unless otherwise stated, fee processes described below are anordered meaning that, when possible, the sequences shown is Fig. 2 can be performed in any convenient or desirable order.

[0060] Referring now to Fig. 2, process 30 will now he described First, one or more iuput signals may be received at fee electronic system (block 32). The input signals may include, for example,- measurements made: of one or more operational parameters using, .for example, sensor elements or fee like. The inputs are nest processed to deiemkae a next operational state of the system (block .34).. The next operational state of the system may then be stored within as operational register or other digital storage structure(s) (block 36), Once stored, the next operational state information becomes the current operational state of the system. The nest operational state information may also be processed to generate redundant information (block 38). The redundant information, may be stored within a redundancy register or other digital or analog storage structure(s) (block 40). Is some implementations, the next operational state information may be stored wiihia. the operational, register at approximately the same time that the redundant information is stored in the redundancy register (e.g, in response to the same clock cycle).

[0061] Use current operational state information stored in fee operational register may subsequently be processed along wife the redundant information stored in the redundancy register to determine whether one or more errors exist (block 42). If one or more errors are detected, corrective action may be initiated (block 44-Y, 46). If no errors are detected, method 30 may return to block 32 and the process may be repeated using newly received Inputs, fa a synchronous circuit, the method 30 described above may be repeated once per clock cycle, In some implementations. As described previously, the corrective action that is initiated may include, for example, a &11 or partis! system reset, a recalibration, setting some or all of the operational state information within an operational register to a "safe" value, sending an alert message to a user of the system, correcting tbe system state information using an error correction code, aad/or other actions, including combinations of the above,

[0062] Although described above in the context of sensors used in vehicular applications, it should be appreciated that fee systems, circuits, features, and techniques described herein may also be used in other electronics applications. These applications may Include, for example, other sensor-related applications, LED driver circuit

applications, motor driver circuit applications, regulator circuit appKeaiioss, photoi!ash driver circuits applications,, and/or others. In each of these different applications, the principles described herein may be used to detect errors within system state Inforraaiiou eaused by, for example, external stresses on the system, and to recover from, those mors.

[0063] As used herein,, the term "magnetic field sensing element" is used to describe a variety of electronic elements that can sense a magnetic field. The magnetic field sensing element may Include, but is not limited to, a Hall effect element, a magnetoreststanee element, or a magnetotransistor; As is known, there are different types of Hall effect elements including, for example, planar Hall elements, vertical Hall, elements, Circular Vertical Hall (CVH) elements, and others. As is also knows, there are different types of magnetoresistance elements including, for example,, a semiconductor magnetoresistance element such as Indium Antimonide (InSb), a giant magnetoresistance(GMR)element, AN anisotropic magnetoresistance element (AMR), a tunnelingmagnetoresistance (TMR) element, and a magnetic tunnel junction (MTI). The magnetic field sensing element may be a single element or, alternatively, may include two or more magnetic field, sensing elements arranged In various configurations (e.g. a half bridge or full (Wheatstone) bridge), Depending on the device type and other application requirements, the magnetic field. sensing element may be a device made- of a type IV semiconductor material such as Silicon (Si) or Germanium (Ge), or a type III-V semiconductor material like Gallium- Arsenide (GaAs) or an. Indium compound, e.g., Indium-Antimonide (InSb).

[0064] As is knows, some of the above-described magnetic field sensing elements may have m axis of maximum sensitivity parallel to a substrate that supports the magnetic field sensing element and some others may have an axis of maximum sensitivity perpendicular to a substrate that supports the magnetic field sensing element. Irs particular, planar Hall elements tend to have axes of sensitivity perpendicular to a substrate, while metal based or metallic magnetoresistance elements (e.g.s GMR, TMR, AMR) and vertical Hall elements tend to have axes of sensitivity parallel to a substrate,

[0065] As used herein, the term "magnetic field seasor is used to describe a circuit that uses a magnetic field sensing element, generally in combination with other circuits. Magnetic field sensors are used in a variety of applications, including, bat sot limited to, an angle sensor that senses an angle of a direction of a magnetic field, a current sensor that senses a magnetic field generated by a current carried by a current-carrying conductor,, a magnetic switch that senses the proximity of a ferromagnetic object, a rotation detector thai senses passing ferromagnetic articles, for example, magaetic domains of a ring magnet or a ferromagnetic target (e.g., gear teeth) where the magnetic field sensor is used in combination with a back-biased or other magnet, and a magnetic field sensor feat senses a magnetic- field density of a magaetic field.

[0066] Having described exemplary embodiments of the invention. It will now become apparent to one of ordinary skill in the art feat other embodiment incorporating their concepts may also be used. The embodiments contained herein should not be limited to disclosesd embodiments hut rather should be limited only by fee spirit and scope of the appended claims. All publications sad references cited herein are expressly incorporated herein by reference in their entirety.