BACKGROUND OF THE INVENTION In certain applications, a central office sends private metering (PRM) pulses to a subscriber station. These pulses are registered in the subscriber station and are a measure of the call fee.

The PRM signal is of a frequency that is above the voice frequency band. Common PRM frequencies are 12 and 16 kHz. The amplitude of the PRM signal is specified as a given value from the central office. The amplitude depends on the market in question and varies in Europe between 0.45V R. M. S in England and 2.5V R. M. S in Italy.

In the subscriber station, a PRM detector has an impedance of about 200 Q for the PRM frequency.

It is normal to send the PRM signal to the subscriber station via a subscriber line interface circuit (SLIC) in the central office.

The amplitude of the PRM pulses from the central office is normally so set that, for the longest subscriber line used, an appropriate amplitude is obtained at the PRM detector in the subscriber station.

If the subscriber line is short, this means that the PRM amplitude in the subscriber station will be much higher than what the PRM detector is intended for. As a result, no PRM detection will take place in the subscriber station.

US 5,452,345 discloses a programmable metering signal generator by means of which the metering signal voltage can be programme to an appropriate level for a specific subscriber line. The PRM level on the subscriber line is sensed and controlled in such a manner that the SLIC is not overloaded.

SUMMARY OF THE INVENTION The object of the invention is to provide a method and an arrangement in a SLIC to automatically adapt the amplitude of PRM signals to any subscriber line length.

This is attained in accordance with the invention in that the PRM signal level is adapted in discrete steps to the DC line voltage such that a high DC line voltage corresponding to a long line results in a high PRM signal amplitude and vice versa.

Hereby, if integrated in a SLIC, SLICs according to the invention can be used for transmitting PRM signals without knowing the actual length of subscriber lines.

BRIEF DESCRIPTION OF THE DRAWING The invention will be described more in detail below with reference to the appended drawing, on which the single Figure shows a block diagram of an embodiment of an arrangement in accordance with the invention.

PREFERRED EMBODIMENT The single Figure shows a PRM signal injection circuit in a SLIC. The rest of the SLIC is not shown.

A PRM signal generator 1 is provided to generate PRM signals to a subscriber station (not shown). The PRM signals are injecte onto a subscriber line comprising

a tip wire 2 and a ring wire 3 via a PRM signal output terminal 4 through the SLIC in a manner not illustrated in the Figure.

In accordance with the invention, the amplitude of the PRM signals from the generator 1 is adapted to the length of the subscriber line 2, 3.

To accomplish this, the injection circuit comprises a line voltage sensing circuit 5 for sensing the DC line voltage, i. e. the DC voltage between the tip wire 2 and the ring wire 3, of the SLIC. The output terminal of the line voltage sensing circuit 5 is connected to one input terminal of at least one voltage comparator. In the embodiment shown, there are two voltage comparators 6 and 7. The other input of the voltage comparator 6 is connected to a reference voltage generator 8, while the other input of the voltage comparator 7 is connected to a reference voltage generator 9 generating a reference voltage which differs from the reference voltage generated by the generator 8. Since the SLIC can be seen as a constant current source when active, the reference voltages will correspond to different lengths of the subscriber line 2,3, requiring different amplitudes of the PRM signals.

In the embodiment illustrated, it is supposed that the reference voltage generator 9 generates a higher reference voltage than the reference voltage generator 8 in correspondence to a longer subscriber line requiring a higher amplitude of the PRM signals.

In this connection, it should be pointed out that there, of course, can be more than two voltage generators and two voltage comparators.

A"1"will appear on the output terminal of the comparator 6 if the DC line voltage sensed by the sensing circuit 5 is higher than the reference voltage generated by the generator 8.

In the same manner, a"1"will appear on the output terminal of the comparator 7 if the sensed DC line voltage is higher than the reference voltage generated by the generator 9.

The output terminal of the comparator 6 is connected to a data input terminal D of a flip-flop 10 having an output O as well as a clock input terminal CK and a clear input terminal CLR.

In the same manner, the output terminal of the comparator 7 is connected to a data input terminal D of a flip-flop 11 which is identical to a flip-flop 10.

The clear input terminals CLR of the flip-flops 10 and 11 are connected to the output terminal of an inventer 12 whose input terminal is connected to a mode input terminal 13 on which a"1"appears when the SLIC is in active mode, and a"0" appears when the SLIC is in stand-by mode.

The clock input terminals CK of the flip-flops 10 and 11 are connected to the output terminal of an AND circuit 14. One input terminal of the AND circuit 14 is connected to the mode input terminal 13, while its other input terminal is connected to a loop detector input terminal 15. On this loop detector input terminal 15, a"1" appears if the subscriber station is off-hook, while a"0"appears when the subscriber station is on-hook.

When a"1"appears on the output terminal of the AND circuit 14, i. e. on the clock input terminals CK of the flip-flops 10 and 11, the outputs O are locked to the signal on the data input terminal D.

In accordance with the invention, the PRM signal generator I is connected to the output terminal 4 via an operational amplifier 16 in that the generator I is connected

to the"+"input terminal of the operational amplifier 16, while the output terminal thereof via a resistor 17 is connected to the"-"input terminal.

In accordance with the invention, the gain of the operational amplifier 16 is increased or reduced in response to the DC line voltage sensed by means of the sensing circuit 5.

This is accomplished in that the interconnection point between the resistor 17 and the"-"input terminal of the operational amplifier 16 is connected to at least one voltage controlled switch via a resistor to signal ground.

In the embodiment shown, the interconnection point 18 is connected to two voltage controlled switches 19 and 20, respectively, via respective resistors 21 and 22 to signal ground.

The switches 19 and 20 may be transistor switches.

The switch 19 is controlled by the voltages appearing on the output O of the flip- flops 10 and 11, while the switch 20 is controlled by means of the voltage appearing on the output O of the flip-flop 11.

When the switches 19 and 20 are in the position shown in the Figure, i. e. off, the gain of the operational amplifier 16 is equal to 1 corresponding to a short subscriber line or a low subscriber line voltage. When either one of the switches 19 and 20 is triggered, the gain is increased in correspondence to a longer subscriber line.

In order to ensure that only one of the switches 19 and 20 is triggered at a time if the sensed DC line voltage is higher than both reference voltages generated by the reference voltage generators 8 and 9, the switch 19 is controlled via an AND gate 24 having one of its inputs connected directly to the output U of the flip-flop 10. The

other input of the AND gate 24, is connected to the output of an inverter 23 whose input is connected to the output O of the flip-flop 11, controlling the switch 20.

In the embodiment shown, it is supposed that the flip-flop 10 controls the gain of the amplifier 16 in correspondence to a lower PRM gain than the gain set by the flip-flop 11. Thus, the flip-flop 10 sets the gain that is required for a shorter subscriber line than the gain set by the flip-flop 11.

Thus, if the output of flip-flop 10 is high, the switch 19 will be triggered only if the output of the flip-flop 11 is low.

If, on the other hand, the output of flip-flop 11 is high, the switch 20 will always be triggered.

When e. g. the switch 19 is on, i. e. a"1"appears on the output O of the flip-flop 10 and a"0"appears on the output 0 of the flip-flop 11, the gain of the operational amplifier 16 will be equal to (Rl 7+RS 1)/R2 1.

Thus, if the sensed DC line voltage is higher than both reference voltages generated by the reference voltage generators 8 and 9, the amplifier 16 will be controlled to increase its gain to increase the amplitude of the PRM signals to a value corresponding to the reference voltage generated by the reference voltage generator 9 in this embodiment.

Should more than two reference voltages be generated, the amplifier will generally be controlled to increase its gain to increase the amplitude of the PRM signals to a value corresponding to the highest of the reference voltages that lies below the sensed DC line voltage

When said subscriber station is detected as being off-hook, i. e. a"1"appears on the loop detector input terminal 15, the gain of said amplifier 16 is latched if the SLIC is in active mode, i. e. a"1"appears on the mode input terminal 13.

Unlatching the gain of said amplifier 16 takes place upon a change to stand-by mode of the SLIC, i. e. when a"0"appears on the mode input terminal 13, clearing the outputs of all flip-flops to"0"and resetting the PRM gain to 1.

The reason for unlatching the amplifier 16 upon a transition to stand-by mode of the SLIC, is to ensure that PRM signals can be sent, even if the subscriber has gone on- hook, as long as the line is considered active, i. e. as long as the SLIC is in active mode. It is e. g. common that so called after-pulses are sent after that the subscriber has gone on-hook after a call.