The invention relates to a method for automatical tuning of an antenna circuit, for example in an RFID interrogator, according to which method the antenna circuit is fed with a carrier signal, to whose frequency the antenna circuit should be tuned, and the reactance of the antenna circuit is changed stepwise untill a tuned antenna circuit configuration is obtained, the natural frequency of which equals the frequency of the carrier signal or is at least close to it. The invention also relates to a circuit for carrying out said method.

An antenna circuit in an RFID interrogator is laid out in a way that its natural frequency equals the frequency of the carrier signal. Thus the carrier signal becomes as strong as possible. In such case the interrogator may supply sufficient power to a responder by means of inductive coupling.

The interrogator antenna circuit is tuned to the carrier frequency of the RFID system due to a better operation of the whole system. Its first tuning is performed during fabrication by compensating for deviations of actual values of the components from the nominal ones. RPID interrogators that comprise means for an automatic tuning of their antenna circuit to the frequency of a carrier signal are also known. A tuning circuit in such RFID interrogator automatically compensates for environmental influences like variations of temperature and humidity or a metal object present in the vicinity.

The antenna circuit is tuned by setting a value of an element having capacitive reactance, an element having inductive reactance or both elements. Very often the value of an element having the capacitive reactance is set in that additional capacitors are switched on or several capacitors are switched off by means of controlled switches.

A typical diagram of a circuit foreseen to tune an antenna circuit A is represented in Fig. 1. A generator G generating alternating current with the frequency f _cs of a carrier signal is connected through a driver D to a series-connected capacitor cO, cl, ..., en and coil co, whose second terminal is connected to mass. The capacitor cO and the capacitors cl, ..., en connectable in parallel thereto by means of switches si, ..., sn controlled by a controller C are the element having capacitive reactance. The voltage at a common terminal of the capacitor cO, cl, ..., en and of the coil co is detected by means of a peak detector PD, whose output is connected through an analogue-to- digital converter ADC to the controller C. The natural frequency f _n of the series- connected capacitor cO and coil co exceeds the frequency f _cs of the carrier signal, however, it approaches the frequency f _cs of the carrier signal when the capacitors cl to en get switched on. At the same time, the current i _cs flowing through the antenna circuit A increases and reaches the peak value when the natural frequency f _n of the tuned antenna circuit A equals the frequency f _cs of the carrier signal or is close thereto (Fig. 2a). The same is true for the voltage detected by the peak detector PD and by means of which the controller C sets the switches si, ..., sn. The switches si, ..., sn are controlled according to an algorithm for achieving the peak value of said voltage. But the peak value of said voltage, which is intended to be reached, is obviously not known in advance at all. The value of the voltage in an individual step and the corresponding setting of the antenna circuit A have to be stored each time. The stored voltage value is then compared to a voltage value in the next step. It may happen that the setting of the antenna circuit A from the previous step turns out to be the best setting achievable by tuning. It must be stored once again. Such algorithm is obviously not the most time efficient.

Thus an RFID tag interrogator is thus provided with a unit carrying out a method of successive-approximation algorithm to automatically tune the interrogator antenna circuit to the natural frequency of the antenna circuit in an RFID tag by changing the interrogator antenna circuit towards the peak value voltage thereat or the peak value current therethrough (EP 0 625 832 Bl).

Further there is known an RFID tag interrogator, which is provided with a current or voltage detector connected to an antenna circuit and to a decision-making circuit that changes the interrogator antenna circuit with regard to the output signal of the detector towards the tuning to the excitation signal (US 6 650 227 Bl).

There is also known an RFID tag interrogator provided with a signal generator and an antenna settable to highest radiated power by means of a microprocessor, which is determined by a received tag signal by means of a peak detector (EP 1 770 665 Bl).

On the other hand the following feature of an antenna circuit A as a circuit, which may resonate when an alterrnating electric current is driven through it, is well known as well. Driving voltage u _o cosω _cs t having a frequency f _cs (ω _cs = 2τf _cs ) of the carrier signal drives the electric current i _o cos(ω _cs t+ Φ _cs ) through the antenna circuit A, which electric current leads the driving voltage at the frequency value f _cs below the natural frequency value f _n and lags the driving voltage at the frequency value f _cs above the natural frequency value f _n , however, at f _cs = f _n the phase difference Φ _cs equals zero (Fig. 2b). The time behaviour of the voltage at a terminal 1 of the capacitor c0, cl, ..., en directly equals the time behaviour of the driving voltage, hence it is u ₀ cosωt, but the time behaviour of the voltage at a terminal 2 of said capacitor is proportional to cos(ω _cs t+ Φ _cs - π/2). Thus at f _cs = f _n the voltage at the capacitor teπninal 2 lags the voltage at the terminal 1 by exactly π/2. At f _cs = f _n the voltage at a second teπninal of the coil co, however, leads the voltage at a first terminal of said coil by exactly π/2. When the natural frequency f _n of the antenna circuit A gets equal to the frequency f _cs of the carrier signal, the absolute value of the phase angle as measured between the voltages at the first and the second terminals of both the capacitive element and the inducive element equals exactly π/2. Then the antenna circuit A is tuned to the frequency f _cs of the carrier signal. Hovever, the value of said phase angle as the value of a measurable variable, by means of which the tuning is now desired to be performed is known in advance in the tuned condition of the antenna circuit A. In fact, it equals π/2. The described feature of the antenna circuit A may therefore make it possible to apply a more time-efficient algorithm.

The technical problem to be solved by the present invention is to propose a method and a circuit for automatical tuning of an antenna circuit to a certain frequency whereat well known phase relations in the tuned antenna circuit, through which an alternating current flows, should be used.

Said technical problem is solved by the method of the invention for automatical tuning of an antenna circuit as characterized by the features of the characterizing portion of the first claim, and by the circuit of the invention for carrying out said method as characterized by the features of the characterizing portions of the eighth and the fourteenth claims. Dependent claims, however, characterize the variants of their embodiments.

Tuning of an antenna circuit to the frequency of the carrier signal is automatically and time-efficiently carried out by means of the method and circuit of the invention. The proposed method and circuit are feasible in a simple way, especially according to the first embodiment of the circuit of the invention where no analogue-to-digital conversion of the signal at the output of the phase detector is needed.

The invention will be now explained in more detail by way of the description of embodiments and with reference to the accompanying drawing representing in Fig. 1 a typical known diagram of a circuit foreseen to tune an antenna circuit,

Fig. 2a frequency dependence of the current through the antenna circuit on the, Fig. 2b dependence of the difference between the voltage phase and the current phase on the frequency,

Fig. 3 circuit of the invention for automatical tuning of the antenna circuit,

Figs. 4a and 4b the first and the second embodiments of a digital phase comparator suitable for carry out the method of the invention for automatical tuning of the antenna circuit,

Fig. 5 simple phase detector,

Fig. 6 window comparator for the first embodiment of the digital phase comparator and

Figs.7a and 7b time behaviour of input signals in the first and second windows, the time behaviour of an output signal from said phase detector the cases the antenna circuit tuned and not tuned.

The method for tuning an antenna circuit A, which is fed by a transmitter carrier signal having the frequency f _cs and to be tuned to this frequency f _cs , is carried out a spresently in that the reactance of the antenna circuit A changes stepwise according to an algorithm stored in a controller C and brings the antenna circuit A closer and closer to a resonance condition (Fig. 3). The invention, however, proposes that each time the phase of the voltage at a first terminal 1 and the phase of the voltage at a second terminal 2 of an element having the reactance of one kind within the antenna circuit A, for example of a capacitor cO, cl, ..., en having the capacitive reactance or a coil co having the inductive resonance, are determined.

In the next step a difference of said phases of the voltages is determined.

The reactance of the antenna circuit A then changes so many times that said difference of phases of said voltages gets close to the value of τr/2, in fact closer than a tiniest phase difference is as can be achieved by said changing of the reactance of the antenna circuit A.

The achieved setting of the antenna circuit A is stored as the setting of the antenna circuit A, which is tuned to said frequency f _cs .

After the difference of phases of said voltages has been determined the method of the invention proposes two variant embodiments.

It is ascertained according to the first variant embodiment whether said difference of the phases exceeds the value of τr/2, is below the value of τr/2 or it is already inside a selected window of the phase difference. This window is selected as presented in the continuation. A middle height of the window equals the ouput voltage of said phase detector when it measures the difference of phases being equal to the value of τ/2. A width of said window, however, equals change in the output voltage of said phase detector at the change in said difference of phases caused in a step, in which the tiniest change in the reactance of the antenna circuit is performed. The two-bit information determined hereby is transferred into the controller C. According to the first variant embodiment, however, the method can be still further simplified in a way that each time it is ascertained whether said difference of the phases exceeds the value of π/2 or it is below the value of τr/2. Now just the one-bit information is transferred into the controller C.

According to the second variant embodiment, said difference of the phases is digitized and the digital value of said difference of the phases is conducted to the controler C. It is determined in the controller C, which is the position of said digital value with respect to the window; the data on said window have been transferred into the controller C.

The controller C then controls the changing of the reactance of the antenna circuit A in a way that said difference of the phases approaches to the value of τ/2. Said control is preferably carried out according to a successive-approximation algorithm.

Also the circuit for tuning the antenna circuit A, which is fed by a transmitter carrier signal having the frequency f _cs and should be tuned to this frequency f _cs , is fabricated like till now with a controller C and a supply circuit comprising a generator G generating the carrier signal with the frequency f _cs and a driver D (Fig. 3). The supply circuit feeds the carrier signal, to whose frequency f _cs the antenna circuit A should be tuned, to the antenna circuit A. Controlled switches si, ..., sn changing the reactance of the antenna circuit A in a stepwise manner are in a known way assembled with the antenna circuit A. The switches si, ..., sn are controlled according to an algorithm implemented in the controller C.

The invention, however, proposes that each one of terminals 1 and 2 of an element having the reactance of one kind in the antenna circuit A, for example of a capacitor cO, cl, ..., en having the capacitive reactance or a coil co having the inductive resonance, is connected to one of input terminals of a phase detector PhD (Figs. 4a and 4b) ₅ in fact through a voltage attenuator VA and a voltage comparator Cl and C2, respectively.

But a signal at the terminal 2 usually must be attenuated before it is conducted to the voltage comparator C2 because at f _cs = f _n the amplitude of this signal exceeds the amplitude of the driving voltage by a factor being equal to the quality factor Q of the antenna circuit A. The attenuation of said signal takes place in the voltage attenuator

VA. The voltage attenuator VA, however, must be accomplished as an voltage divider made of capacitors otherwise the voltage attenuator VA in connection with the capacitance of the voltage comparator C2 would change the phase of the signal at the terminal 2.

Voltages a. and β at said terminal 1 and also at said terminal 2 but behind the voltage attenuator VA, respectively, are conducted to first terminals of the voltage comparators Cl and C2, respectively. Second terminals of the voltage comparators Cl and C2 are connected to mass, output voltages d and /3' from said voltage comparators Cl and C2, however, are conducted to input terminals of the phase detector PhD.

The phase detector PhD is represented in Fig. 5. Said voltages d and β are conducted to inputs of an exclusive-OR gate exor, whose output is connected through an re element to an output of the phase detector PhD. A voltage signal having a constant level appears here.

The time behaviour of the voltages d and /3' at the input of the phase detector PhD is represented in the first and second window in Fig. 7, respectively, for the case that the voltages at the terminals 1 and 2 and consequently also the voltages d and /3' are to each other displaced in phase by τr/2. The level of the output signal γ in the third window in Fig. 7 being at the half height of the voltage level sv of the signals supplied to the phase detector PhD demonstrates that the phase displacement is τr/2 indeed. The same signals are represented also in Fig. 8 but for the case that the voltages at the terminals 1 and 2 are to each other displaced by the phase angle being different from τr/2.

According to a first embodiment of a digital phase comparator DPhC of the invention the analogue output signal 7 of the phase detector PhD is conducted to an input of a window comparator WC (Fig. 4a). Output signals OH and OL from the window comparator WC are conducted into the controller C.

The contoller C each time gathers from the state of the signals OH and OL at the output of a combinatory logic circuit CL whether the difference of the phases exceeds the value of τr/2, is below the value of τr/2 or it is already inside the window at the value of τr/2.

The above description concerns the simpler embodiment of the digital phase comparator DPhC of the invention. This embodiment needs no analogue-to-digital converter. The two output signals OH and OL from the window comparator WC bring enough data to the controller C that the tuning of the antenna circuit A can be controlled by an efficient algorithm.

The window comparator WC according to one possible variant embodiment is represented in Fig. 6. The input signal γ is conducted to the combinatory logic circuit CL through voltage comparators C and C", whose second level is determined by means of voltage dividers VD' and VD", respectively.

The level of the window middle in the window comparator WC equals the output voltage of this phase detector PhD when it measures the phase difference being equal to τr/2. A change in the output voltage of said phase detector PhD at the change in said phase difference caused in a step, in which the tiniest change in the reactance of the antenna circuit A is performed, is chosen as the width of the window in the window comparator WC. According to a second embodiment of the digital phase comparator DPhC of the invention, however, the output of the phase detector PhD is connected to an analogue- to-digital converter ADC (Fig. 4b). A digital output signal γd from the analogue-to- digital converter ADC is conducted into the controller C. The controller C now performs the function of the window comparator too.

The first and second embodiment of the circuit of the invention for automatically tuning the antenna circuit A is further characterized in that the reactance of the antenna circuit A changes by means of the controlled switches si, ..., sn in a stepwise manner in a way that the difference of the phases of the voltages at both connecting terminals 1 and 2 of said element cO, cl, ..., en or co as determined by the phase detector PhD will approach to the value of τr/2 closer than a tiniest phase difference is as can be set by said changing of the reactance of the antenna circuit A.

The successive-approximation algorithm is preferably used as an algorithm foreseen for the approaching of said difference of the phases of said voltages to the value of π/2. The setting of the antenna circuit A achieved in this way is stored as the setting of the antenna circuit A tuned to said carrier frequency f _cs .

The antenna circuit A as represented in Fig. 3 is actually the series-connection of the capacitor and the coil, however, the technical solution of the invention can be used also at a parallel-connection or a mixed connection of this kind, if necessary measures are taken into account. The proposed technical solution can be used as well for an antenna circuit differentially fed and connected between two drivers opposite in phase. The antenna circuit A itself is usually fabricated with high-voltage controlled switches si, ..., sn (Fig. 3) because the voltage amplitude at the terminal 2 in the antenna circuit A at f _cs = f _n exceeds the amplitude of the driving voltage by the factor being equal to the quality factor Q of the antenna circuit A. If high-voltage p-type and n-type transistors cannot be fabricated according to the technology used for fabrication of the antenna circuit A ₅ the antenna circuit A is fabricated with only n-type high-voltage transistors, which are mass connected but not to the driver.