Title:
METHOD OF DRIVING RESISTANCE CHANGING ELEMENT, METHOD OF INITIALIZATION OF SAME, AND NONVOLATILE MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/096194
Kind Code:
A1
Abstract:
Disclosed are a method of driving a resistance changing element capable of stable operation, and a nonvolatile memory device that executes the method. The method comprises the steps of writing to the nonvolatile memory device, which lowers the resistance by applying a pulsed voltage of a first polarity to resistance changing layers wherein two metal oxide layers with different ratios of oxygen content are stacked, and of erasing the nonvolatile memory device, which increases the resistance by applying a pulsed voltage of a second polarity that differs from the first polarity. When a voltage value of a pulsed voltage in first to Nth writing steps is designated Vw1, a voltage value of a pulsed voltage in the (N+1)th writing step and thereafter is designated Vw2, a pulse width of a pulsed voltage in first to Mth erasing steps is designated te1, and a pulse width of a pulsed voltage in the (M+1)th erasing step and thereafter is designated te2, then the formulae |Vw1| > |Vw2| and te1 > te2 are satisfied, and the (N+1)th writing step continues after the Mth erasing step.
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Inventors:
IIJIMA, Mitsuteru (())
飯島 光輝 (())
飯島 光輝 (())
Application Number:
JP2011/000545
Publication Date:
August 11, 2011
Filing Date:
February 01, 2011
Export Citation:
Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
IIJIMA, Mitsuteru (())
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
IIJIMA, Mitsuteru (())
International Classes:
G11C13/00; H01L27/10; H01L45/00; H01L49/00
Attorney, Agent or Firm:
NII, Hiromori (6F Tanaka Ito Pia Shin-Osaka Bldg.,3-10, Nishi Nakajima 5-chome, Yodogawa-ku, Osaka-cit, Osaka 11, 〒5320011, JP)
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Claims: