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Patent Searching and Data


Title:
METHOD FOR FABRICATING NONVOLATILE MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2012/014447
Kind Code:
A1
Abstract:
In each of the steps of forming a first resistance change layer (18a) and of forming a second resistance change layer (18b), a cycle is executed once or a plurality of times, the cycle including: a first step of introducing a source gas comprising a molecule containing a transition metal atom; a second step of, after the first step, removing the source gas; a third step of, after the second step, introducing a reactive gas and forming a transition metal oxide; and a fourth step of, after the third step, removing the reactive gas. The step of forming the first resistance change layer (18a) is executed while the substrate temperature is maintained at a temperature that does not cause the self-decomposition reaction of the source gas. The conditions under which the second resistance change layer (18b) is formed are made different from the conditions under which the first resistance change layer (18a) is formed in any one of or a plurality of conditions of the substrate temperature, the introduction amount of the source gas, and the introduction amount of the reactive gas.

Inventors:
FUJII, Satoru (())
藤井 覚 (())
MIKAWA, Takumi (())
Application Number:
JP2011/004207
Publication Date:
February 02, 2012
Filing Date:
July 26, 2011
Export Citation:
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Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真1006番地 Osaka, 〒5718501, JP)
FUJII, Satoru (())
藤井 覚 (())
International Classes:
H01L27/105; H01L27/10; H01L45/00; H01L49/00
Attorney, Agent or Firm:
PATENT CORPORATE BODY ARCO PATENT OFFICE (3rd Fl, Bo-eki Bldg. 123-1 Higashimachi, Chuo-ku, Kobe-sh, Hyogo 31, 〒6500031, JP)
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Claims: