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Title:
METHOD FOR FORMING ELECTRODE PATTERN, METHOD FOR CONNECTING ELECTRODE PATTERNS, METHOD FOR FORMING DYE SENSITIZED SEMICONDUCTOR ELECTRODE AND PHOTOELECTRIC CELL MODULE
Document Type and Number:
WIPO Patent Application WO/2007/023881
Kind Code:
A1
Abstract:
Provided is a method for electrically connecting a pair of electrode patterns (22, 83) arranged through an insulating layer. A bonding mask (69) is provided with a wiring section forming hole (68b) penetrating the front and rear planes of a laminated body wherein a base material film (64) is bonded on a hot melt layer (66). The method is provided with a step of bonding the mask on a first substrate (82) whereupon the first electrode pattern (83) is formed on a front plane, by thermocompression so that a wiring section forming hole (68b) is aligned with the first electrode pattern (83). The method is also provided with a step of filling the wiring section forming hole (68b) with a conductive paste (61a); a step of peeling the base material film (64) from the hot melt layer (66); and a step of bonding a second substrate (20) whereupon a second electrode pattern (22) is formed on the front plane, on the exposed hot melt layer (66) by thermocompression so that the second electrode pattern (22) is aligned with the wiring section forming hole (68b).

Inventors:
KOGURE HIDEO (JP)
Application Number:
PCT/JP2006/316562
Publication Date:
March 01, 2007
Filing Date:
August 24, 2006
Export Citation:
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Assignee:
KANSAI PAINT CO LTD (JP)
KOGURE HIDEO (JP)
International Classes:
C23C14/04; H01L31/04; H01M14/00
Foreign References:
JPH1012904A1998-01-16
JP2004158661A2004-06-03
JP2004296669A2004-10-21
JP2002093476A2002-03-29
JP2002289895A2002-10-04
Attorney, Agent or Firm:
SAEGUSA, Eiji et al. (1-7-1 Doshomachi, Chuo-k, Osaka-shi Osaka, JP)
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