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Patent Searching and Data


Title:
METHOD FOR FORMING ELECTRONIC CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2010/074054
Kind Code:
A1
Abstract:
Provided is a method for forming an electronic circuit, wherein after forming a nickel or nickel alloy layer on the etching surface side of a rolled copper foil or an electrolytic copper foil, a copper-plated multilayer board is formed by plating a resin substrate with the rolled copper foil or the electrolytic copper foil, then, a resist pattern for forming a circuit on the copper foil is formed. Then, unnecessary portions of the copper foil on the copper-plated multilayer board and those of the nickel or nickel alloy layer other than the portions where the resist pattern is formed are removed by using an etching solution composed of a ferric chloride solution, then, the resist is removed, the remaining nickel or nickel alloy layer is removed by soft etching, and a circuit wherein a space between copper circuits has a width two or more times the thickness of the copper is formed. The circuit having the uniform circuit width is formed, etching performance in pattern etching is improved, and generation of short-circuits and circuit width failures are eliminated.

Inventors:
YAMANISHI KEISUKE (JP)
KAMINAGA KENGO (JP)
FUKUCHI RYO (JP)
Application Number:
PCT/JP2009/071283
Publication Date:
July 01, 2010
Filing Date:
December 22, 2009
Export Citation:
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Assignee:
NIPPON MINING CO (JP)
YAMANISHI KEISUKE (JP)
KAMINAGA KENGO (JP)
FUKUCHI RYO (JP)
International Classes:
H05K3/06; C23C28/00; C23F1/02; C25D7/06; H05K3/24
Foreign References:
JPH0681172A1994-03-22
JP2002176242A2002-06-21
JP2005039097A2005-02-10
JP2004512698A2004-04-22
Other References:
None
Attorney, Agent or Firm:
OGOSHI ISAMU (JP)
Isamu Ogoshi (JP)
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