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Patent Searching and Data


Title:
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2022/041928
Kind Code:
A1
Abstract:
Provided in the embodiments of the present application are a method for forming a semiconductor structure and the semiconductor structure. The method for forming the semiconductor structure comprises: providing a semiconductor substrate (100), the semiconductor substrate (110) comprising an array area (120) and a peripheral area (110), and multiple discretely arranged electrically-conductive layers (121) being provided in the array area (120); forming a support layer (200) covering the semiconductor substrate (100), where an interconnect layer is provided in the support layer (200) arranged on the array area (120), the interconnect layer also is extended to the peripheral area (110) and is used for electrically connecting to the electrically-conductive layer (121) and transmitting an electric signal of the electrically-conductive layer (121) to the peripheral area (110); and patterning the support layer (100) to form multiple discrete support structures arranged on the peripheral area (110) and interconnect structures (210) arranged on the array area (120) and the peripheral area (110), where the interconnect layer is found in the interconnect structures (210). By reducing the area occupied by the support structures, the phenomenon of metal peeling is avoided.

Inventors:
LIU CHIHCHENG (CN)
Application Number:
PCT/CN2021/099427
Publication Date:
March 03, 2022
Filing Date:
June 10, 2021
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108
Foreign References:
CN1508862A2004-06-30
CN111223860A2020-06-02
CN1705080A2005-12-07
US6223432B12001-05-01
Other References:
See also references of EP 4195274A4
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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