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Title:
METHOD FOR MANUFACTURING CAPACITOR, METHOD FOR MANUFACTURING SUBSTRATE WITH BUILT-IN CAPACITOR, SUBSTRATE WITH BUILT-IN CAPACITOR, AND SEMICONDUCTOR DEVICE MOUNTING COMPONENT
Document Type and Number:
WIPO Patent Application WO/2018/038094
Kind Code:
A1
Abstract:
Provided are: a step (1) for forming a first electrode 3A; a step (2) for forming a high dielectric thin film 5 on the first electrode 3A; a step (3) in which a solder-containing resin composition 6 that contains a resin component and a melting temperature transition-type solder is provided on the high dielectric thin film 5, degassing is performed, and the resin is filled into pinholes in the high dielectric thin film 5; a step (4) in which the melting temperature transition-type solder 6 is allowed to settle and a melting temperature transition-type solder layer 7 is formed on the high dielectric thin film 5; a step (5) for melting the melting temperature transition-type solder layer 7, and prompting the formation of an alloy to yield a conductor layer 8 for which the re-melting temperature is MP; a step (6) in which the resin component is hardened at a temperature lower than the melting temperature MP of the conductor layer 8 to make a resin hardened layer 9; and a step (7) for forming a through hole in the resin hardened layer 9 and exposing the conductor layer, and also forming a second electrode connected to the conductor layer.

Inventors:
MIURA SHIGENOBU (JP)
Application Number:
PCT/JP2017/029906
Publication Date:
March 01, 2018
Filing Date:
August 22, 2017
Export Citation:
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Assignee:
MIURA SHIGENOBU (JP)
International Classes:
H05K1/16; H01G4/12; H01L23/12; H05K3/46
Domestic Patent References:
WO2004040604A12004-05-13
Foreign References:
JP2008042118A2008-02-21
JP2008041930A2008-02-21
JP2002094242A2002-03-29
JP2008160040A2008-07-10
JP2007305825A2007-11-22
JP2008084933A2008-04-10
JP2008113002A2008-05-15
Attorney, Agent or Firm:
KURIHARA, Hiroyuki et al. (JP)
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