Title:
METHOD FOR MANUFACTURING A FANOUT SEMICONDUCTOR PACKAGE USING A LEAD FRAME, AND SEMICONDUCTOR PACKAGE AND PACKAGE-ON-PACKAGE FOR SAME
Document Type and Number:
WIPO Patent Application WO/2013/065895
Kind Code:
A1
Abstract:
Disclosed are a method for manufacturing a fanout semiconductor package using a lead frame, and a semiconductor package and a package-on-package for same. To this end, in the method of the present invention, a lead frame is installed at the perimeter of a semiconductor chip in order to realize a fanout semiconductor package structure. Accordingly, a signal lead is used so as to use the lead frame two-dimensionally and three-dimensionally in order to simplify complicated circuit designs and reduce the number of metal layers which are formed. The lead frame can be used as a flat-type connecting terminal or a three-dimensional vertical-type connecting terminal inside the semiconductor package.
Inventors:
SOH SAY HEAN (SG)
SIEW YUEN ZIEN (MY)
KWON YONG TAE (KR)
SIEW YUEN ZIEN (MY)
KWON YONG TAE (KR)
Application Number:
PCT/KR2011/009049
Publication Date:
May 10, 2013
Filing Date:
November 25, 2011
Export Citation:
Assignee:
NEPES CO LTD (KR)
SOH SAY HEAN (SG)
SIEW YUEN ZIEN (MY)
KWON YONG TAE (KR)
SOH SAY HEAN (SG)
SIEW YUEN ZIEN (MY)
KWON YONG TAE (KR)
International Classes:
H01L23/48; H01L21/78; H01L23/12
Foreign References:
| JP2010073893A | 2010-04-02 | |||
| KR20010039537A | 2001-05-15 | |||
| JP2005294443A | 2005-10-20 |
Attorney, Agent or Firm:
JEON, YONG JUN (KR)
전용준 (KR)
전용준 (KR)
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Claims: