Title:
METHOD FOR MANUFACTURING METAL OXIDE THIN FILM TRANSISTOR ARRAY SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2018/010214
Kind Code:
A1
Abstract:
The present invention provides a method for manufacturing a metal oxide thin film transistor array substrate. The thin film transistor adopts a top-gate coplanar structure, which can effectively reduce stray capacitance; an active layer, an insulating layer, and an exposed area of the active layer after a gate metal layer is patterned are processed by illumination twice, to overcome the defect of a low-temperature deposited film, increase carrier concentration in a channel region, and enhance the electrical conductivity of a contact region between a source and a drain; therefore, the contact resistance between the source and the active layer and between the drain and the active layer is lowered, the mobility and the current on/off ratio are improved, and the electrical property of the thin film transistor is further improved.
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Inventors:
XIANG ZHOUYI (CN)
Application Number:
PCT/CN2016/091824
Publication Date:
January 18, 2018
Filing Date:
July 27, 2016
Export Citation:
Assignee:
SHENZHEN CHINA STAR OPTOELECT (CN)
International Classes:
H01L21/26; H01L21/268; H01L21/28; H01L21/34; H01L21/84
Foreign References:
| CN105529366A | 2016-04-27 | |||
| KR20100120939A | 2010-11-17 | |||
| CN103177969A | 2013-06-26 | |||
| US20090309102A1 | 2009-12-17 |
Attorney, Agent or Firm:
COMIPS INTELLECTUAL PROPERTY OFFICE (CN)
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