Title:
METHOD FOR MANUFACTURING MULTILAYER ELECTRONIC COMPONENT
Document Type and Number:
WIPO Patent Application WO/2016/002789
Kind Code:
A1
Abstract:
Provided is a method for manufacturing a multilayer electronic component that can form insulating parts while suppressing overlapping even when distances between adjacent internal electrodes are small and thus can suppress occurrences of differences in levels during layering.
This method for manufacturing the layered electronic component has an insulating part (20) in a region outside of a region wherein internal electrodes (15) are formed in a ceramic green sheet (11). A plurality of insulating films (16a) are formed by supplying insulating paste (16) while keeping a prescribed gap open in regions between adjacent internal electrodes (15) such that the internal electrodes (15) partially overlap. The plurality of insulating films (16a) are made to flow by layering and pressing ceramic green sheets (11) on which the plurality of insulating films (16a) have been formed, and the plurality of insulating films (16a) form the insulating part (20) as a unit in regions outside of the regions where the internal electrodes (15) are formed.
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Inventors:
GOTO SEIJI (JP)
Application Number:
PCT/JP2015/068849
Publication Date:
January 07, 2016
Filing Date:
June 30, 2015
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/30; H01F41/12; H01G4/12
Foreign References:
| JP2000311831A | 2000-11-07 | |||
| JP2006278565A | 2006-10-12 | |||
| JP2007266350A | 2007-10-11 | |||
| JP2008016706A | 2008-01-24 | |||
| JP2004165375A | 2004-06-10 | |||
| JPH09219339A | 1997-08-19 |
Attorney, Agent or Firm:
FUKUNAGA Masaya (JP)
Masaya Fukunaga (JP)
Masaya Fukunaga (JP)
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