Title:
METHOD FOR MANUFACTURING MULTILAYER SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2017/212934
Kind Code:
A1
Abstract:
A method for manufacturing a multilayer board includes: a preparation step, a filling step, and first, second, and third forming steps. In the preparation step, an insulating base 12 having a conductor pattern 18 formed on one surface is prepared. The conductor pattern 18 is formed of elemental Cu in such instances. An Ni layer 16 is formed on the surface of the conductor pattern 18 on the insulating base 12 side. In the first forming step, a via hole 20 having the conductor pattern 18 as a bottom 20a is formed on the insulating base 12. At this time, an Ni layer 16 positioned in the area to become the bottom 20a is removed. In the filling step, the inside of the via hole 20 is filled with an electroconductive paste 22. In the second forming step, a plurality of insulating bases 12 is laminated to form a laminated body 24. In the third forming step, heating is performed while pressing the laminated body 24. In the method for manufacturing a multilayer board, a plurality of insulating bases 12 is thereby integrated, and a via 26 is formed. A diffusion layer 24 including metallic elements and Cu elements in the electrically conductive paste 22 is formed at this time between the conductor pattern 28 and the via 26.
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Inventors:
HARADA TOSHIKAZU (JP)
Application Number:
PCT/JP2017/019527
Publication Date:
December 14, 2017
Filing Date:
May 25, 2017
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H05K3/46; H01L23/12; H05K3/40
Domestic Patent References:
WO2010103941A1 | 2010-09-16 | |||
WO2008143099A1 | 2008-11-27 |
Foreign References:
JP2007250581A | 2007-09-27 | |||
JP2015015285A | 2015-01-22 | |||
JP2001226795A | 2001-08-21 | |||
JPS6086894A | 1985-05-16 | |||
JP2001168481A | 2001-06-22 |
Attorney, Agent or Firm:
TOHDA, Kiyoshi (JP)
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