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Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE HAVING GROUP-III NITRIDE COMPOUND LAYER
Document Type and Number:
WIPO Patent Application WO/2017/154924
Kind Code:
A1
Abstract:
[Problem] To provide a method for manufacturing a semiconductor substrate having a patterned group-III nitride compound layer, the pattern of which is not destroyed by reflow or decomposition, even when an etching method with a high temperature of 300-700℃ is used. [Solution] A method for manufacturing a semiconductor substrate having a patterned group-III nitride compound layer, the method characterized by comprising a step in which a patterned masking layer is formed on a group-III nitride compound layer of a substrate, a step in which dry etching at a temperature of 300-700℃ is used to etch the group-III nitride compound layer in accordance with the masking pattern, thereby forming a patterned group-III nitride compound layer; and by the patterned masking layer comprising a polymer comprising a structural unit represented by formula (1), a polymer comprising a structural unit represented by formula (2), a polymer comprising a structural unit represented by formula (3), or a polymer comprising a combination of a structural unit represented by formula (2) and a structural unit represented by formula (3), or a crosslinked structure of said polymers.

Inventors:
HASHIMOTO KEISUKE (JP)
SOMEYA YASUNOBU (JP)
HORI MASARU (JP)
SEKINE MAKOTO (JP)
Application Number:
PCT/JP2017/009061
Publication Date:
September 14, 2017
Filing Date:
March 07, 2017
Export Citation:
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Assignee:
NISSAN CHEMICAL IND LTD (JP)
UNIV NAGOYA (JP)
International Classes:
H01L21/3065; C08G12/08; C08G65/40; G03F7/11; G03F7/26; G03F7/40; H01L21/027
Domestic Patent References:
WO2013047516A12013-04-04
WO2012050064A12012-04-19
WO2010041626A12010-04-15
Foreign References:
JP2014045049A2014-03-13
JP2007311801A2007-11-29
JP2014024831A2014-02-06
Attorney, Agent or Firm:
HANABUSA PATENT & TRADEMARK OFFICE (JP)
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